CA1212412A - Stepper motor control circuit - Google Patents
Stepper motor control circuitInfo
- Publication number
- CA1212412A CA1212412A CA000420712A CA420712A CA1212412A CA 1212412 A CA1212412 A CA 1212412A CA 000420712 A CA000420712 A CA 000420712A CA 420712 A CA420712 A CA 420712A CA 1212412 A CA1212412 A CA 1212412A
- Authority
- CA
- Canada
- Prior art keywords
- output
- amplifier
- resistor
- circuit
- stepper motor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000004804 winding Methods 0.000 claims abstract description 44
- 239000003990 capacitor Substances 0.000 claims description 55
- 230000000295 complement effect Effects 0.000 claims description 8
- 230000000737 periodic effect Effects 0.000 claims description 5
- 238000003556 assay Methods 0.000 description 5
- 238000002866 fluorescence resonance energy transfer Methods 0.000 description 5
- 230000002441 reversible effect Effects 0.000 description 4
- 230000001105 regulatory effect Effects 0.000 description 3
- 230000035939 shock Effects 0.000 description 3
- 230000001276 controlling effect Effects 0.000 description 2
- 230000001419 dependent effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000001965 increasing effect Effects 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- BHELIUBJHYAEDK-OAIUPTLZSA-N Aspoxicillin Chemical compound C1([C@H](C(=O)N[C@@H]2C(N3[C@H](C(C)(C)S[C@@H]32)C(O)=O)=O)NC(=O)[C@H](N)CC(=O)NC)=CC=C(O)C=C1 BHELIUBJHYAEDK-OAIUPTLZSA-N 0.000 description 1
- 238000012935 Averaging Methods 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 230000001174 ascending effect Effects 0.000 description 1
- 230000002146 bilateral effect Effects 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000010363 phase shift Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 102200127556 rs34159654 Human genes 0.000 description 1
- 239000007858 starting material Substances 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P8/00—Arrangements for controlling dynamo-electric motors rotating step by step
- H02P8/12—Control or stabilisation of current
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Control Of Stepping Motors (AREA)
Abstract
ABSTRACT OF DISCLOSURE
A stepper motor control circuit includes a waveform generator circuit which produces two identical substantially stepless symmetrical waveforms (preferably of triangular configuration) at a frequency which can be varied on demand. Each waveform is used as a current demand signal for a pulse width modulator with a push-pull output stage controlling current in the motor windings . The pulse width modulator runs at a fixed frequency an order of magnitude higher than the maximum required stepping frequency. A current sensing resistor provides a feedback signal which is fed back to input of the modulator to balance the demand signal.
A stepper motor control circuit includes a waveform generator circuit which produces two identical substantially stepless symmetrical waveforms (preferably of triangular configuration) at a frequency which can be varied on demand. Each waveform is used as a current demand signal for a pulse width modulator with a push-pull output stage controlling current in the motor windings . The pulse width modulator runs at a fixed frequency an order of magnitude higher than the maximum required stepping frequency. A current sensing resistor provides a feedback signal which is fed back to input of the modulator to balance the demand signal.
Description
~2~2~2 1.
This invention relates to a stepper motor control circuit.
In known stepper motor control circuits, control of the current by means of a chopper operating at a frequency an order of magnitude higher than the maximum stepping rate has already been proposed. The circuits employed in the prior art have, however, been extremely complex and have usually employed output stages containing a large number of high power semi-conductor components.
In addition, although the problem of shock loading of the rotor by the stepping pulses to it has been considered previously, no completely satisfactory solution has been proposed.
.
In accordance with one aspect of the invention a stepper motor control circuit comprises a waveform generator circuit arranged to generate a pair of substantially stemless symmetrical periodic waveforms of constant amplitude and of frequency determined by a variable step rate demand signal received thereby, the waveforms being 90 out of phase, a pair of pulse width modulation circuits arranged to drive the motor windings, each modulation circuit receiving one waveform as a current demand signal and a feedback signal related to the instantaneous current in the associated one of the motor windings.
The term "substantially stemless" is used herein to mean a waveform in which any step changes which occur are of very small magnitude compared with the amplitude of the waveform. Thus, for example, the waveform could be generated utilizing digital techniques, wherein the waveform amplitude is represented by a digital signal of at least 7 bits, 80 that a change in the digital signal represents a step in the wave form of only one one hundred and twenty eight of the waveform amplitude.
Preferably, each modulation circuit includes an output stage comprising a pair of semi-conductor switch elements which are transformer coupled to a driving stage of the modulation circuit. The output stage is preferably arranged as a push-pull stage operating between positive and negative power supply rails with the windings connected to an earth return through a current sensing resistor which provides the current feedback signal.
Preferably, the pulse width modulating circuits are arranged to operate at a fixed frequency at least an order of magnitude higher than the maximum stepping frequency.
Four examples of the invention are shown in Figures 1 to 4 respectively of the accompanying drawings which are electrical circuit diagrams of the stepper motor control circuits.
Referring firstly to Figure 1, the stepper motor which is being controlled has four windings, two of which, lo and 11 are shown in the accompanying drawing. These windings are connected in parallel with one another, via a current sensing resistor Al to ground at one end and to the junction of two inductors Lo, Lo at the other end. The inductors Lo, Lo are connected in series between the collector of a pup transistor Al and the collector of an nun transistor Q2~ Transistor Al has its emitter connected to a positive power supply rail 12 and transistor Q2 has its emitter connected to a I
negative power supply rail 13. The inductor Lo is magnetically linked to a winding Lo which is connected between ground and the anode of a diode Do, the cathode of which is connected to rail 12. Similarly inductor Lo is linked to a winding Lo connected between ground and the anode of a diode Do which has its cathode connected to the rail 13. A capacitor K3 is connected between the junction of inductors Lo and Lo and ground.
Transistor Al is biased off by a resistor R3 connecting its base to the rail 12. The base of transistor Al is also connected to the anodes of two diodes I and Do the cathodes of which are connected to opposite ends of two series connected secondary windings Trial and TRY
the common point of which is connected via a resistor R4 to the rail 12. similarly, transistor Q2 is biased off by a resistor Us convected between rail 13 and the base of transistor Q2 which is also connected to the cathodes of two diodes Do and Do having their anodes connected to opposite ends of two series secondary windings Trouble and TRIBE, the common point of which is connected by a resistor US to the rail 13.
The transformer of which the windings Trial and TRAY are the secondaries has two primary windings TRAY and TRAY
which are both connected at one end to the collector of a pup transistor Q3 the emitter of which is connected to a + 12V regulated supply rail 14. The other ends of windings TRAY and TRAY are connected to the anodes of two diodes Do and Do which have their cathodes connected respectively to the C2 and Of output terminals of a switch mode pulse width modulation control integrated circuit 15 (type TL494MJ
manufactured by Motorola In). A resistor R7 interconnects the anodes of the diodes Do and Dug.
Similarly two primary windings TRIBE cod TRIBE associated with windings Trouble and TRIBE are connected at one end to the collector of a pup transistor Q4, the emitter of which is convected to the rail 14. Two diodes Dug and Duo connect the other ends of the windings TRY and TRIBE to the C2 and Of terminals of icky 15~ A resistor R8 interconnects the anodes of diodes Dug and Duo.
The transistors Q3 and Q4 are controlled by a signal at a terminal A so that when this signal is high transistor Q3 is off and transistor Q4 is on and when the signal is low transistor Q3 is on and transistor Q4 is off. To this end transistor Q3 has its base connected by a resistor Rug to the rail 14 and by a resistor Rio to the terminal A. The transistor Q4 has its base connectedly a resistor Roll to the rail 14 and by a resistor Rl2 to the collector of an nun transistor Us the emitter of which is connected to a ground rail 16 and the base of which is connected by a resistor R13 to the terminal A.
The integrated circuit 15 has its CAL. sense inverting input terminal connected by a resistor Rl4 to a terminal B and by a resistor Rlj to the rail 16. The error amplifier non-inverting input terminal is connected by a resistor Al to terminal B and by a resistor R17 to rail 16. The error amplifier inverting input terminal and the CAL. sense amplifier non-inverting input terminal are both connected to the junction between the current sensing resistor Al and the windings 10 and if. The compensation/P~M Comparator terminal us left open circuit and is not used. The dead time control terminal, the ground terminal and the E
and En terminals are all connected to rail 16. A
resistor Al connects the RUT terminal to rail 16 and a capacitor Al connects the CT terminal to ground. These I
!
two eomponen~s control the frequency of a clock oscillator incorporated in icky. 15. The YR~F and output control terminals of the icky. 15 are connected together.
The error amplifier non-inverting input terminal of the icky. 15 is also connected to the cathode of a diode D
and the CAL. sense amplifier inverting input terminal is connected to the anode of a diode D12. The anode of diode Dull and the cathode of diode D12 are connected together and also connected via a resistor 19 to the terminal A.
The terminals A and B are the output terminals of a waveform generation circuit which occupies the lower half of the drawing.
This waveform generation circuit receives an 8-bit digital word as an input, such word being derived in parallel form from a control computer (not shown), and representing the desired stepping frequency of the stepper motor. The respective bit inputs are connected by a simple d-to-a conversion network to the inverting input of an operational amplifier Al which has a feedback resistor R20 connected between its output and its inverting input. The non-inverting input of amplifier Al is connected to the reference voltage output of the icky. 15.
The inverting input of an amplifier A is connected by a resistor R21 to the output of amplifier Al and by a resistor R22 to the output of amplifier A. The non-inverting input of amplifier A is grounded via a resistor R23. Resistors R21 and R22 are of equal value so that amplifier A acts as a unity gain inverting amplifier providing an output signal of the same magnitude as the output of amplifier Al, but of 3~2~
opposite sign.
Two pairs of complementary photos. Q6 and Q7, Q8 and Qg are each connected in series between the outputs of amplifiers Al and A the gates of photos. Q6 and Q7 being connected together by two resistors R24 and R2s in series and the gates of photos. Q8 arid Qg being connected together by two resistors R26 and R27. The voltage at the junctions of each of these pair of resistors determines which one of each pair of photos.
is conductive.
The junction between transistors Q8 and Qg is connected via a resistor R28 to the inverting input of an operational amplifier A which has its non-inverting input grounded by a resistor Rug and its output connected by a feedback capacitor K2 to its inverting input. The amplifier A operates as an integrator, the output of which ramps linearly at a rate determined by the output voltage of amplifiers Al and in a sense determined by which of the two photos. Q8 and Qg is conductive.
The output or amplifier A is connected by a resistor R30 to the non-inverting input of a comparator A which has its inverting input grounded. I've output of comparator A is connected by two resistors R31 and R32 in series to its inverting input, the junction of these resistors being connected by two oppositely connecter zoner diode D13, D14 to ground. The output of amplifier A is connected to the junction of resistors R2s and R27 so as to control the photos. Q8 and Qg.
The amplifier A and the comparator A operate together as a triangular waveform generator with the output of amplifier A swinging between two fixed positive and æ
negative voltage levels set by the zoner diodes D13 and D14~ The frequency of the waveform is directly proportional to the voltage. The maximum value of the stepping frequency is an order of magnitude less than the frequency of the chopper.
The output of amplifier A is connected to terminal B
and is also connected by a resistor R34 to the inverting input of a comparator As, the non-inverting input of which is connected to ground by a resistor R33. The output of comparator As is connected to terminal A and is also connected by a relatively high ohmic value resistor R3s to its non-inverting input.
This ensures sharp swung of the comparator between its two output states, the comparator As operating as a zero-crossing detector.
Assuming that the zoner diodes D13 and D14 have breakdown voltages of 6.8V, the output of amplifier A
ramps between -7.5V and 17.5~. The output of comparator As is - 12V when the A output is positive and +12V
when it is negative. The effect of resistors Al to Rl7 and Rig and diodes Dull and D12 is to determine which one of inputs of the icky. 15 receives a real demand signal in the range of O to + 75mV and which one receives a false signal, the magnitude of which is increase by current flowing through resistor Rig.
Considering a cycle of operation which commences when the output of amplifier A is at -7.5V and rising, the signal at terminal B will be 7.5V and that a terminal A, +12V. As a result the signal at the inverting input of the Cal. sense amplifier of icky. 15 will be -75mV
whereas that at the non-inverting input of the error amplifier will be positive. The internal "high-wins"
diode gate in icky. 15 ensures that only the error I
signal corresponding to the difference between the -75mV input signal and the voltage across Al has any controlling effect. The icky. 15 operates to route fixed frequency variable duration pulses through the ElCl and EKE path within the icky 15. Since transistor Q4 it on as a result of the output of comparator A being +12V, transformer TUB is pulsed so that transistor Q2 is pulsed on and off appropriately. The current level in the winding 10 and 11 is regulated in this way to make the voltage across resistor Al - 75mV.
As the output of amplifier A rises the current in resistor Al is progressively reduced. When the output of amplifier A crosses zero, the output of comparator As changes to -12V so that the signal at the inverting input of the CAL. sense amplifier falls instantaneously to a relatively large negative value whereas that at the non-inverting input of the icky. error amplifier falls to OVA At the same time transistor Q4 switches off and transistor Q3 switches on to cause the pulses from icky. to control Al instead of Q2 and the forward current passed increases as the output of amplifier A
becomes increasingly positive. The inductors Lo and Lo serve to limit the current rise should transistors Al and Q2 become conductive simultaneously for a period during the zero crossing switch-over. Furthermore the windings Lo, Lo, which make up 1:1 transformers (at the switching frequency) with the respective inductors L
and Lo, the diodes Do, Do and the capacitor K3 ensure that motor current is maintained whilst either Al or Q2 is switched off, and is "dumped" in the appropriate supply rail 12 or 13 even at low stepping frequency.
Similarly the current in windings 10 and 11 is controlled during the period when the output of amplifier A is ramping downwardly.
The stepper motor also includes a second pair of windings (not shown) which are to be drive with a current waveform 90 out of phase with that in the windings 10 and a and either lagging or leading depending on the required direction of drive. To this end a second integrating amplifier A, and further comparators A and A are provided. Amplifier A and comparator A provide signals to terminals D and C
which are inputs to another circuit exactly the same as that shown in the upper half of the drawing as described above, which circuit drives the other two motor windings. Amplifier As integrates the signal at the output of photos. Q6 and Q7 which are controlled by the signal at the output of comparator A.
To ensure that the two waveform generator circuits run in the required phase relationship, an photo. Lo- is connected between the output and inverting input terminals of amplifier A to ensure that the integrating capacitor associated therewith is held discharged at certain times The gate of transistor Lo is connected by a resistor R40 to a -12V rail 17. The gate of transistor Al is also connected via a capacitor K4 and a resistor Rho in series to the collector of a pup transistor Ill which has its emitter connected to the rail 14 and its collector connected by a resistor R41 to the rail 17.
The base of transistor Ill is connected by a resistor R42 to the output terminal of amplifier A and also connected to the junction of two resistors R43, R44 in series between the rail 14 and the collector of an nun transistor Q12 The emitter of the transistor Ql2 is grounded and its base is connected to the junction of two resistors R4s, R46 in series between a FEEDERS
terminal and ground. Further the gate of transistor Lo ,' ~æ~æ
is connected by a resistor Rsl and a capacitor Us in series with the drain-source of a field effect transistor Q13 to ground. The gate of transistor Q13 is connected directly to the FWD/RVSE terminal. A resistor Rs2 connects the drain of transistor Q13 to the output of amplifier A.
For forward running the start of the triangular wave at D should coincide with the leading edge of the square wave from amplifier A, whereas far reverse running it should coincide with the trailing edge of that square Dave. The square wave at the output of amplifier A is inverted by transistor Ill When the signal at the FWD/RVSE terminal is high Ill is turned on continuously, thereby preventing it from operating as an inventor, but the photo. Q13 is off. Thus the positive going edges of the square wave output of amplifier A are differentiated by capacitor Us and provide positive going spikes coincident with these edges Jo turn of foe. to Lo The negative spikes created at the trailing edges of the square waves have a effect. When the signal at the FWD/RVSE terminal is low photo. Q13 it on and therefore grounds the pulses arriving via resistor Rs2. Transistor Ill acts as an inventor and the rising edges of the inverted waveform create positive spikes to turn on photo. Lo in synchronism with the trailing edges of the square waves from amplifier Aye The circuit described ensures that no shock loads are applied to the rotor of the motor. The use of a chopper current control to control current with a triangular waveform or other stemless symmetrical waveform overcomes the problem in known stepper motor controls of shock excited "pendulum" type vibration of the rotor. Thus no pull-in and drop-out problems arise from Jo rotor resonances bring excited. The rotor can be stopped in any desired position between the normal stable positions by maintaining the current in the motor windings at the level at which it was flowing at the moment of coming to rest. Controlled acceleration and deceleration of the motor under the control of the computer are easily achieved.
The use of transformer coupling to the output transistors Al and Q2 and the employment of a three rail supply enable the output stage to be made very simple. Only two high power transistors are needed and two diodes Do and Do provide the necessary current recirculation paths, with winding current continuing to flow through the sensing resistor Al.
The integrated circuit 15 employed, although intended for use in power supply regulation, proves to be entirely suitable for stepper motor control and makes the chopper drive circuit extremely simple.
The circuit may also include a current/voltage phase monitor 18 arranged to provide additional current into the summing junction of amplifier Al when the current in resistor Al is out of phase with the voltage at the junction of inductors Lo and Lo. In this way the stepping frequency is reduced if the motor is overloaded.
Turning now to Figure 2, the phase windings 210, 211 of the motor are represented by a single inductor. The current in these windings is controlled by a pair of complementary Frets, Q201 and Q202 connected in series between the power supply rails 212, 213. The windings 210, 211 are connected at one end to the common point of these Frets and at the other end via a current sensing resistor R201 to ground. The Frets Q201 and Q202 are again driven by a PAM modulator icky 215 (TL494), but in this case no isolating transformers are needed.
The Of and C2 outputs of this icky. are connected together (these are open collector outputs), and are connected by a constant current diode D201 as load to a Peter regulated supply (resistor R202~ zoner diodes DZ02 and D203 in series, and a smoothing capacitor K20 connected across the zoner diodes) which is connected between the rail 212 and ground, and also connected by a resistor R203 to the buses of two complementary transistors Q203 and Q204- These transistors have their emitters connected together and have their collectors connected by respective resistors R204, R205 to the rails 212, 213. A pair of complementary Frets Q205~ Q206 which act as drivers for the Frets Q201~ Q202 respectively have their gates connected to respective ones of the collector of transistors Q203. Q204 and have their drain-source paths connected the gates of respective ones of the Frets Q201~ Q203 to the rails 212, 213. The output of Frets Q201.~ Q202 are protected by two zoner diodes D~04, D205 and each FRET R204, R~05 is projected by two zoner diodes D206, D207 and D208~
3209 connected as shown in Figure 2. A capacitor K202 connects the emitter of transistors Q203~ Q204 to the bases thereof to provide for rapid switching on and off of these transistors and, therefore, of the driver Frets Q2G5~ Q206 and the output Frets Q201. Q202- The emitter of the transistors Q203, Q20~ are connected by a resistor R206 id parallel with the series combination of a resistor R237 and a capacitor K203 to the common point of zoner diodes D202 J D203 So as to control the gain/frequency characteristic of the transistor Q20 The V REV output of the icky. 215 is connected by a .
I
resistor R208 to the error amplifier inverting input thereof such input being also connected by a capacitor K204 to the error amplifier output of the icky. 215 and by a resistor R209 to the non-earthy side of the current sensing resistor Ply so as to provide motor current feedback to the icky. 215. The GUT and RUT
terminals of the icky.- 215 are grounded by a capacitor K205 and a resistor R210 respectively. The DEAD TIME
CONTROL input of icky. 215 is connected to a terminal A
and is also connected by a resistor R211 to rail 213 and by a diode D210 to ground.
The non-inverting input of the error amplifier of the icky. 215 is connected by a resistor R212 to the output of an operational amplifier Aye and by a resistor R213 to ground. Amplifier Aye operates in conjunction with an operational amplifier Aye an integrated 8-bit counter and digital-to-analog converter 216 (Ferranti ZN425) and a CMOS analog bilateral switch 217 (lJ4 DG211) as a triangular waveform generator which provides a current demand signal to the pulse width modulator based on icky. 215.
The ANALOG OUTPUT terminal of the converter 216 is connected directly to the non inverting input of amplifier Aye which has its output connected by a resistor R214 to its inverting input so thaw it operates as a unity gain voltage follower. The MOB
output of converter 216 is connected to the control terminal of switch 217 and the signal path of the switch 217 is connected between the output of amplifier Aye and the inverting input of amplifier Allah. The V-REF output of converter 216 is connected directly to the V-REF input thereof and is also connected by a resistor R21s to the non-inverting input of amplifier Allah The output of amplifier Aye is connected by a i' ~2~z~æ
resistor R216 to the inverting input of amplifier A
and a resistor R217 of the same value as resistor R216 is connected between he output of amplifier Aye and its inverting input.
The CLOCK input ox the converter 216 is connected to a suitable source of clock pulses, the frequency of which - determines the stepping rate of the motor. The amplifier Aye operates as a unity gain inverting amplifier or as a voltage follower according to whether the switch 217 is conductive or not. When the switch 217 is conductive, which occurs when the MOB output of converter 216 is high, to. when the analog output is at a voltage higher than half the reference voltage output by V REV terminal of converter 216, the output of amplifier Aye is connected directly to the non-inverting input of amplifier Allah which acts as a unit gain voltage follower. Thus, as the count in the counter of converter 216 increases, the output of amplifier Aye increases linearly. When the switch 217 is non-conductive, the amplifier Aye as a unity gain inverting amplifier so that the output of amplifier Aye decreases linearly as the count in the counter of converter 216 increases. Since this counter operates cyclically, the ANALOG output of converter 216, provides repeated saw tooth waveform, which the amplifier Aye and switch 217 connect into a symmetrical substantially stemless triangular waveform.
A second counter converter 218, a second switch 219 and two amplifiers Aye and Aye are connected similarly to provide a second triangular waveform, which is used for providing a current demand signal to another pulse wave modulation circuit (not shown controlling the other two phase windings of the motor.
I-.'''' The relative phase of the two waveform generators is controlled by a logic, circuit which receives inputs for the second and third MOB outputs of the converter 218 and provides reset pulses periodically to the converter 216. This logic circuit comprises seven RAND
gates Go, to Go. Gate Go has its inputs connected respective to the second and third MOB outputs of converter 218, whereas gate Go has one input connected to the third MOB output and the other connected to the output of gate Go both inputs of which are connoted to the second MOB output to operate as a logic inventor.
Gate Go has one input from the output of gate Go and one from a forward/reverse input terminal 220. Gate Go has one input connected to the output of gate Go and the other connected to the output of gate Go, both inputs of which are connected to the terminal 220. Gate Go has one input from gate Go and one from gate Go and drives a differentiator comprising a capacitor K2G6 a resistor R218 and a diode D211, the output of this differentiator is connected to RESET terminal of converter 216 when the signal on terminal 220 is low (FORWARD) the output of gate Go is in phase with the output of gate Go, i.e. it is high except when both of the second and third ~5B outputs are high. A reset pulse is delivered by the differentiator when the output of gate Go goes low, thereby resetting the converter 216 halfway through the ascending flank of the waveform of generators 218, 219, Aye, Aye similarly, when the signal at terminal 220 is low converter 216 is reset half way through the descending flank of the other waveform.
A simple digital waveform generator as described above has the advantage that the "integrators" constituted by the counter/converter 216 218 have no tendency to drift.
. - .
I
æ
At very low stepping speed the clock can directly connected to a control, computer, thereby enabling very accurate control of the motor shaft position (which fed back to the computer) down to one sixty-fourth of a step). At high stepping rates a digit-to-frequency converter or a rate multiplier can be used to give accurate speed and replacement control, Turning now to Figure 3 a different pulse width modulation circuit (but still using a TL494 integrated circuit) and a different doughtily waveform generator are employed. The waveform generator simply uses a counter 310 the output of which is fed to two ROMs 302 and 303 which store waveform data and provide outputs to two digital-to-analog converters 303, 304. One ROM 303 can store two sets of waveform data to enable the necessary advance/re~ard of the waveform to be obtained for forward and reverse operation. Converter 304 provides a current demand waveform for the pulse width modulator which drives the phase windings 310, 311 of the motor, whereas converter 305 provides a waveform for the other modulator (not shown) for the other phase windings (not shown).
The pulse width modulator shown in Figure 3 utilizes two HEXFETs Q301 and Q302 connected in series with two series inductors L301-, L302 between the supply rails 312 and 313. Protective diodes D301 and D302 are connected across the two H~XFETs Q301 and Q302 respectively. The junction of the two inductors L301, L302 (which are provided to limit the rate of current rise should the conduction periods of the two HEXFETs overlap) is connected by another inductor L303 to one end of windings 310, 311> the other end being grounded via a current sensing resistor R301. The gate of HEXFET
301 is connected to the emitters of a firs pair of complementary driver transistors Q303, Q304, the gate of HEXFET Q302 being connected to the emitter of another pair of couple entry driver transistors Q30s, Q306 The collectors of the transistors Q303, Q304, are connected respectively to the +28V rail 312 and to a -12V rail 314. Similarly the collectors of transistor Q305, Q306 are connected to a -12V rail 315 and the 28V rail 313. the +12V,-12V rails 314, 315 are zoner stabilized, utilizing xenon diodes D303, D304, feed resistors R302, R303 arid smooth capacitors K302, K303 respectively. The transistors Q303, Q304, Q305 and Q306 are controlled by another complementary transistor pair Q307~ Q308 which have their emitters connected to a 4.7V supply provided by a zoner diode D30s in series with a resistor R304 between rail 312 and ground. The collector of transistor Q307 (nun) is connected by two resistors R30s, R306 in series to rail 312 with the junction of these resistors connected to the bases of the transistors Q303, Q304. Similarly two resistors R307, R308 in series connect the collector of transistor Q308 to the rail 313 and the junction of these resistors is connected to the bases of transistors Q305~ Q306- The bases of the transistors Q307~ Q308 are connected together and a capacitor K304 connects them to the emitters of these transistors.
Furthermore a resistor R30g connects the base of transistor Q307, Q308 to the C2 output terminal of icky.
316~ which terminal is connected to rail 312 by a resistor R310. The "current limit" amplifier of icky 316 is not used, its non-inverting input being grounded and its inverting input being connected to the VREF
output thereof. The OUTPUT CONTROL and En terminals are also grounded. The chopping frequency of the icky. 316 is set at about 100 OH by a resistor R311 and a capacitor K30s connecting the RUT and CT terminals of icky. 316 to ground. The error amplifier I
non-inverting input it grounded by a resistor R312.
In toe example shown in Figure 3 the error amplifier of the icky. 316 is used merely as an inverting amplifier stage operating on the signal from a operational amplifier Aye. This receive a its inverting input the current demand signal from the converter 304 via a resistor R313 and a current feedback signal from an operational amplifier Aye via a resistor R314. The non-inverting input of amplifier Aye is grounded via a resistor R31s. Local feedback around amplifier Aye is provided by a capacitor K306 and a resistor R31s in series between the output and inverting input terminals of amplifier Aye, the voltage at the output of amplifier Aye being limited by two relatively reversed zoner diodes D306, D307 in series between the inverting input and the output terminals thereof.
Amplifier Aye acts as a low pass filter operating to filter out the 100 KHz component of the voltage signal generated in the resistor R301 when current is flowing in windings 310, 311. Resistor R301 is connected by resistors R316~ R317 in series to the inverting input of amplifier Aye, the junction of these resistors being connected to ground by a capacitor K307. The non inverting input of amplifier Aye is grounded via a resistor R3l~ and feedback around amplifier Aye is provided by a capacitor K30~3 connected between the output terminal and the inverting input terminal, and by a resistor R3lg connected between the output terminal and thy junction of resistors R316 and R3l7.
The DEAD TIRE CONTROL terminal of i.e. 316 is biassed to a small negative voltage and the inverting input of the error amplifier of icky. 316 is biased to an adjustable negative voltage by means of a resistor I
chain R320. R321, R322. R323 connected between the anode of a 4.7V zoner diode D308 and ground. The cathode of zoner diode D308 is grounded and its emitter is connected by a resistor R324 to the ~12V rail 315.
The resistor R321 is, in fact, a preset potentiometer and has its starter connected by a resistor R32s to the inverting input of the error amplifier of icky. 316. the junction of resistors R322 and R323 is connected to the DEAD TIME CONTROL input. The error amplifier receives its input from operational amplifier Allah via a resistor R326 and local negative feedback is provided by a resistor R327.
In the example shown in Figure 3, the pulse width modulator operates by switching Hexes Q301 and Q302 on alternately at the chopping frequency referred to and thereby maintaining the actual average current in the windings 310, 411 a the desired level set by converter 304.
The arrangement shown in Figure 4 includes an analog waveform generator driving a simple bipolar transistor pulse width modulator.
The windings 410, 411 are connected at one end to the junction of two inductors L401~ L402 connected it series between the collectors of two output transistors Q401, Q402~ and at the other end via a current sensing resistor R401 to ground. Transistor Q401 is a pup transistor and has its emitter connected to the positive supply rail 412, whereas transistor Q402 is an nun transistor which has its emitter connected to the negative supply rail 413~ The transistor Q401. Q402 are controlled by an operational amplifier Aye which has a Load resistor R402 connected between its output terminal and ground. The positive and negative supply terminals of amplifier Aye are connected to rails 412 and 413 by respective resistors R~,03, Roy and are also connected respectively to the bases of the transistors Q401 and Q402. Positive feedback is provided via a resistor R40s, in parallel with the series combination of a resistor R406 and a capacitor K401, between the collector of the transistor Q401 and the non-inverting input of amplifier Aye. Negative feedback is provided by a resistor R407 connected between resistor R4~1 and the inverting input of amplifier Aye, a capacitor K402 connecting this inverting input to the rail 413. A
current demand signal is applied to the non-inverting input of amplifier Aye via a resistor R408 and a resistor R40g connects this non-inverting input to the rail 413.
- The amplifier Aye in fact operates as a voltage comparator. When the voltage at the inverting input is higher than that at the non-inverting input current OOZE from ground through the resistor R402 into the output ox amplifier Aye and hence through resistor R404 to rail 413. Thus transistor Q402 turns on. When the voltage at the inverting input is lower than that at the non-inverting input, transistor Q403 turns on.
Resistor R40s changes the voltage at non-inverting input of amplifier Aye to cause the amplifier Aye to operate in the manner of a Schmidt trigger with upper and lower thresholds linearly dependent on the current demand signal. Current feedback via resistor- R407 shunted by capacitor K402 makes the whole circuit into an oscillator and the inductive load ensures that the charge/discharge rates of capacitor K402 depend on the average current flow in the load so that pulse-width modulation is obtained to regulate the current to the demand value.
I
The current demand signal its derived from an operational amplifier Aye connected as an active integrator having an input resistor R410 and a feedback capacitor K~03. A resistor R411 connects the non-inverting input of amplifier Aye to ground. The output of amplifier Aye is connected by a resistor R412 to the non-inverting input of an amplifier Aye the inverting input of which is connected by a resistor R413 to ground. Two resistors R414 and R41s in series connect the output of amplifier Aye to its non-inverting input, the junction of such resistors being connected to ground by two back-to-back zoner diodes Doyle and D402 in series. The junction of resistors R414 and R41s is also connected by a resistor R416 to the integrator input resistor ~410. Two capacitors K404 and K4Qs are connected by oppositely soled diodes V403, D404 to the junction of resistors R416 and R410, suck capacitors being grounded. An amplifier Aye is connected to ensure that the voltages on capacitors K404 and K40s are equal and opposite. To this end amplifier Aye has its inverting input connected by a resistor R417 to the capacitor K404 and its non-inYerting input grounded via a resistor R41go A
feedback resistor R41g connects the output of amplifier Aye to its inverting input to provide unity gain inverting operation and the output of amplifier Aye is connected to capacitor K40s.
It will be appreciated that the amplifier Aye operates as a Schmidt trigger circuit determining the polarity of the signal applied via the resistor R410 to the integrating amplifier Aye. However, the magnitude of the signal applied to the integrator depends on the voltage for the time hying stored on the capacitors K404, K40s. The circuit thus Ear described therefore operates as a triangular waveform generator, the amplitude of the waveform being fixed, but the frequency being inversely proportional to the voltage stored on the capacitors K404, K405~
A second integrator is provided for generating an identical waveform, suitably phase-shifted, for the other phase windings (not shown) of the motor. This second integrator includes an operational amplifier Assay which has its non-inverting input grounded via a resistor R420. An input resistor R421 for this integrator is connected at one end to the anode of a diode D40s, which ha its cathode connected to the capacitor K404, and to the cathode of a diode D406 which has its anode connected to the capacitor K40s, and at the other end to the inverting input of amplifier Assay. A feedback capacitor K406 is connected to between the output and non-inverting input terminals of the amplifier Assay, the resistor R421- Two zoner diodes D407, D408 connected bac~-to-back are also connected between the output and inverting input terminals of amplifier Assay-The polarity of the signal integrated by amplifier Assess determined by an operational amplifier Aye which is connected to operate as a 2ero-crossing detector. The two inputs of this amplifier Aye are connected by respective resistors R422 and R423 to the output of amplifier Aye. The inverting input is connected by a resistor R424 to ground whereas the non-inverting input is connected by the drain source path of an FRET Q403 to ground. The amplifier Aye operates in inverting or non-inverting mode according to whether the FIT Q403 is conductive or not. The gate of FRET Q403 is connected to a FWD/RVS input terminal 415, the signal at which thus determines the mode of operation of the amplifier Aye.
The output terminal of amplifier Aye is connected by a ..,~
resistor R42s to the anode of a zoner diode Dog, which is connected back-to-back with a zoner diode D410 having its anode connected to ground. A resistor R426 connects the anode of zoner diode Doug to the anodes of the diode D405-Each of the integrators Aye and Assay has a resetting circuit associated with it and these are controlled by 3 single nun transistor Q~04 which has its emitter grounded and its collector connected to the ~15V rail by a resistor R427. The base of this transistor is connected by resistor R428 to the ~15V rail, by a resistor R42g to the capacitor K40s and by a diode D411 to ground, the cathode of diode D411 being connected to the vase of transistor Q404. The resetting circuit associated with amplifier Aye includes an FIT Q40s with its gate connected to the collector of transistor Q404, its drain connected by a resistor R430 to the collector of transistor Q404 and by two bac~-to-back zoner diodes D~12 and D413 to the output of amplifier Aye and its source connected to the inverting input of amplifier Aye FRET Q405 is conductive whenever the transistor Q404 it of which occurs when the voltage on capacitor ~405 is sufficient to hold the base of transistor Q404 low. ID these circumstances the zoner diodes D412 and ~413 determine the peak positive and negative excursion of the output of amplifier Aye instead of the amplifier AGO. The resetting circuit of amplifier Assay is identical and comprises a similarly connected FRET Q406. two zoner diodes D414 and D41s and a resistor Roy .
The voltage on capacitor K404 is limited by an external limiting circuit snot shown) to which it is connected via a PRO SAX terminal 414. a STOP/RUN terminal 416 is connected to the anode of a diode D~16 the cathode of I
which is connected to the cathode of a diode D~17 having its anode connected to the capacitor K404. A
constant current diode D41g connects the cathodes of diodes D416 D~17 to the -15V rail when the signal at the RIJN/STOP terminal is low tube capacitor K404 discharges linearly to zero through the constant current diode D41g. When the signal at the RUN/STOP
diode is high capacitor K404 can charge up vet resistor I and diode D403 from the output of amplifier Aye.
The circuit a 50 includes a stall or slip detector which operates by comparing the phases of the voltage across and current in the winding 410 411. This detector circuit includes an operational amplifier Aye which has its non-inverting input grounded by resistor R43~ and its inverting input connected to the capacitor R402 Of the pulse width modulator circuit. This amplifier Aye detects zero crossings in the average current waveform. Another operational amplifier Aye has its inverting input grounded by a resistor R433 and its oon-inverting input connected by a resistor R434 to the collector of the transistor Q402 and by a capacitor K407 in parallel with a variable resistor --R43s to ground. Resistor R434 and capacitor K407 operates as an averaging filter and amplifier Aye thus detects zero crossings in the average voltage waveform.
The amplifier Aye and Aye have open-collec~or outputs and the output terminals of these are connected together and are connected by a resistor R436 to the rail 4120 These output terminals are also connected by a resistor R437 to the inverting input of an amplifier Ago such input also being connected by a capacitor K408 to ground. The non-inverting input of amplifier Ago is connected to a reference voltage source which supply a reference voltage representing the maximum i torque which the motor can provide without slipping.
The amplifiers Aye and Aye have open-collector outputs and the output terminals of these are connected together and are connected by a resistor R436 to the fall 412. These output terminals are also connected by a resistor R437 Jo the inverting input of an amplifier Ago, such input also being connected by a capacitor K408 to ground. The non-inverting input of amplifier Ago is connected to a reference voltage source which supply a reference voltage represent the maximum torque which the- motor can provide without slipping.
the amplifiers Aye and Aye form a phase detector such that, when the voltage and current waveforms are exactly in phase one or other of the outputs is zero, thereby holding capacitor K408 discharged. As the torque on the motor is increased the phase difference between the current and voltage waveforms increases so that for an increasing proportion of the time the outputs of both amplifies Aye, Aye are high simultaneously. Thus capacitor K408 charges to a voltage which is dependent on the phase-shift, i.e. on the torque load on the motor.
The output of amplifier Ago is connected to a SLIP/STALL terminal which may be connected to a stall indicator. In addition the output of amplifier Ago is connected to the cathode of a diode D41g, the anode of which is connected by a resistor R438 to the capacitor K404- .
In use, as mentioned above when the signal at the STOP/RUN terminal 416 is low capacitor K404 is held discharge so that neither integrator Aye or Aye operates When the signal at terminal 416 goes high the capacitor K404 will start to change from which ever one of the amplifiers Aye, Aye is producing a high output. The signal which is integrated by the amplifiers Aye Aye is thus initially small in magnitude and the rate at which the motor is stepped is therefore correspondingly slow. As the capacitor K404 charges, however, the stepping rate increases until the maximum step rate determined by the transistor Q~04 is reached (or determined by the PRO MAX input if this is lets. The two waveforms produces are maintained 90 out of phase by the operation of amplifier Aye and any drift which occurs in the integrating amplifier Aye, Aye is dealt with automatically by clipping of the waveforms by operation of the resetting circuits referred to (unless the PRO MA control is in use).
Should slip or stall occur the output of amplifier Aye goes tow, causing the capacitor K404 to discharge through the resistor R438 and the diode ~419~ thereby reducing the stepping rate to a- level at which the - output of amplifier Ago goes high, whereupon capacitor K404 will start to recharge.
In all of the circuits described above a waveform generator circuit provides a pair of substantially stemless symmetrical periodic waveforms which provide current demand signals to two pulse width modulation circuits driving the phase windings of the motor.
Provision is made in every case for maintaining a phase difference of 90 (either a lead or a log for forward/reverse control) between the waveforms and the step rate is variable either by changing the frequency of a clock signal in the case of the digital waveform generators, or by varying an analog signal which is integrated in the case of the analog waveform generators. In every case these measures provide smooth and accurate control of the stepper motor and permit running of the motor at higher stepping rates than are usually possible.
.,~
..~
This invention relates to a stepper motor control circuit.
In known stepper motor control circuits, control of the current by means of a chopper operating at a frequency an order of magnitude higher than the maximum stepping rate has already been proposed. The circuits employed in the prior art have, however, been extremely complex and have usually employed output stages containing a large number of high power semi-conductor components.
In addition, although the problem of shock loading of the rotor by the stepping pulses to it has been considered previously, no completely satisfactory solution has been proposed.
.
In accordance with one aspect of the invention a stepper motor control circuit comprises a waveform generator circuit arranged to generate a pair of substantially stemless symmetrical periodic waveforms of constant amplitude and of frequency determined by a variable step rate demand signal received thereby, the waveforms being 90 out of phase, a pair of pulse width modulation circuits arranged to drive the motor windings, each modulation circuit receiving one waveform as a current demand signal and a feedback signal related to the instantaneous current in the associated one of the motor windings.
The term "substantially stemless" is used herein to mean a waveform in which any step changes which occur are of very small magnitude compared with the amplitude of the waveform. Thus, for example, the waveform could be generated utilizing digital techniques, wherein the waveform amplitude is represented by a digital signal of at least 7 bits, 80 that a change in the digital signal represents a step in the wave form of only one one hundred and twenty eight of the waveform amplitude.
Preferably, each modulation circuit includes an output stage comprising a pair of semi-conductor switch elements which are transformer coupled to a driving stage of the modulation circuit. The output stage is preferably arranged as a push-pull stage operating between positive and negative power supply rails with the windings connected to an earth return through a current sensing resistor which provides the current feedback signal.
Preferably, the pulse width modulating circuits are arranged to operate at a fixed frequency at least an order of magnitude higher than the maximum stepping frequency.
Four examples of the invention are shown in Figures 1 to 4 respectively of the accompanying drawings which are electrical circuit diagrams of the stepper motor control circuits.
Referring firstly to Figure 1, the stepper motor which is being controlled has four windings, two of which, lo and 11 are shown in the accompanying drawing. These windings are connected in parallel with one another, via a current sensing resistor Al to ground at one end and to the junction of two inductors Lo, Lo at the other end. The inductors Lo, Lo are connected in series between the collector of a pup transistor Al and the collector of an nun transistor Q2~ Transistor Al has its emitter connected to a positive power supply rail 12 and transistor Q2 has its emitter connected to a I
negative power supply rail 13. The inductor Lo is magnetically linked to a winding Lo which is connected between ground and the anode of a diode Do, the cathode of which is connected to rail 12. Similarly inductor Lo is linked to a winding Lo connected between ground and the anode of a diode Do which has its cathode connected to the rail 13. A capacitor K3 is connected between the junction of inductors Lo and Lo and ground.
Transistor Al is biased off by a resistor R3 connecting its base to the rail 12. The base of transistor Al is also connected to the anodes of two diodes I and Do the cathodes of which are connected to opposite ends of two series connected secondary windings Trial and TRY
the common point of which is connected via a resistor R4 to the rail 12. similarly, transistor Q2 is biased off by a resistor Us convected between rail 13 and the base of transistor Q2 which is also connected to the cathodes of two diodes Do and Do having their anodes connected to opposite ends of two series secondary windings Trouble and TRIBE, the common point of which is connected by a resistor US to the rail 13.
The transformer of which the windings Trial and TRAY are the secondaries has two primary windings TRAY and TRAY
which are both connected at one end to the collector of a pup transistor Q3 the emitter of which is connected to a + 12V regulated supply rail 14. The other ends of windings TRAY and TRAY are connected to the anodes of two diodes Do and Do which have their cathodes connected respectively to the C2 and Of output terminals of a switch mode pulse width modulation control integrated circuit 15 (type TL494MJ
manufactured by Motorola In). A resistor R7 interconnects the anodes of the diodes Do and Dug.
Similarly two primary windings TRIBE cod TRIBE associated with windings Trouble and TRIBE are connected at one end to the collector of a pup transistor Q4, the emitter of which is convected to the rail 14. Two diodes Dug and Duo connect the other ends of the windings TRY and TRIBE to the C2 and Of terminals of icky 15~ A resistor R8 interconnects the anodes of diodes Dug and Duo.
The transistors Q3 and Q4 are controlled by a signal at a terminal A so that when this signal is high transistor Q3 is off and transistor Q4 is on and when the signal is low transistor Q3 is on and transistor Q4 is off. To this end transistor Q3 has its base connected by a resistor Rug to the rail 14 and by a resistor Rio to the terminal A. The transistor Q4 has its base connectedly a resistor Roll to the rail 14 and by a resistor Rl2 to the collector of an nun transistor Us the emitter of which is connected to a ground rail 16 and the base of which is connected by a resistor R13 to the terminal A.
The integrated circuit 15 has its CAL. sense inverting input terminal connected by a resistor Rl4 to a terminal B and by a resistor Rlj to the rail 16. The error amplifier non-inverting input terminal is connected by a resistor Al to terminal B and by a resistor R17 to rail 16. The error amplifier inverting input terminal and the CAL. sense amplifier non-inverting input terminal are both connected to the junction between the current sensing resistor Al and the windings 10 and if. The compensation/P~M Comparator terminal us left open circuit and is not used. The dead time control terminal, the ground terminal and the E
and En terminals are all connected to rail 16. A
resistor Al connects the RUT terminal to rail 16 and a capacitor Al connects the CT terminal to ground. These I
!
two eomponen~s control the frequency of a clock oscillator incorporated in icky. 15. The YR~F and output control terminals of the icky. 15 are connected together.
The error amplifier non-inverting input terminal of the icky. 15 is also connected to the cathode of a diode D
and the CAL. sense amplifier inverting input terminal is connected to the anode of a diode D12. The anode of diode Dull and the cathode of diode D12 are connected together and also connected via a resistor 19 to the terminal A.
The terminals A and B are the output terminals of a waveform generation circuit which occupies the lower half of the drawing.
This waveform generation circuit receives an 8-bit digital word as an input, such word being derived in parallel form from a control computer (not shown), and representing the desired stepping frequency of the stepper motor. The respective bit inputs are connected by a simple d-to-a conversion network to the inverting input of an operational amplifier Al which has a feedback resistor R20 connected between its output and its inverting input. The non-inverting input of amplifier Al is connected to the reference voltage output of the icky. 15.
The inverting input of an amplifier A is connected by a resistor R21 to the output of amplifier Al and by a resistor R22 to the output of amplifier A. The non-inverting input of amplifier A is grounded via a resistor R23. Resistors R21 and R22 are of equal value so that amplifier A acts as a unity gain inverting amplifier providing an output signal of the same magnitude as the output of amplifier Al, but of 3~2~
opposite sign.
Two pairs of complementary photos. Q6 and Q7, Q8 and Qg are each connected in series between the outputs of amplifiers Al and A the gates of photos. Q6 and Q7 being connected together by two resistors R24 and R2s in series and the gates of photos. Q8 arid Qg being connected together by two resistors R26 and R27. The voltage at the junctions of each of these pair of resistors determines which one of each pair of photos.
is conductive.
The junction between transistors Q8 and Qg is connected via a resistor R28 to the inverting input of an operational amplifier A which has its non-inverting input grounded by a resistor Rug and its output connected by a feedback capacitor K2 to its inverting input. The amplifier A operates as an integrator, the output of which ramps linearly at a rate determined by the output voltage of amplifiers Al and in a sense determined by which of the two photos. Q8 and Qg is conductive.
The output or amplifier A is connected by a resistor R30 to the non-inverting input of a comparator A which has its inverting input grounded. I've output of comparator A is connected by two resistors R31 and R32 in series to its inverting input, the junction of these resistors being connected by two oppositely connecter zoner diode D13, D14 to ground. The output of amplifier A is connected to the junction of resistors R2s and R27 so as to control the photos. Q8 and Qg.
The amplifier A and the comparator A operate together as a triangular waveform generator with the output of amplifier A swinging between two fixed positive and æ
negative voltage levels set by the zoner diodes D13 and D14~ The frequency of the waveform is directly proportional to the voltage. The maximum value of the stepping frequency is an order of magnitude less than the frequency of the chopper.
The output of amplifier A is connected to terminal B
and is also connected by a resistor R34 to the inverting input of a comparator As, the non-inverting input of which is connected to ground by a resistor R33. The output of comparator As is connected to terminal A and is also connected by a relatively high ohmic value resistor R3s to its non-inverting input.
This ensures sharp swung of the comparator between its two output states, the comparator As operating as a zero-crossing detector.
Assuming that the zoner diodes D13 and D14 have breakdown voltages of 6.8V, the output of amplifier A
ramps between -7.5V and 17.5~. The output of comparator As is - 12V when the A output is positive and +12V
when it is negative. The effect of resistors Al to Rl7 and Rig and diodes Dull and D12 is to determine which one of inputs of the icky. 15 receives a real demand signal in the range of O to + 75mV and which one receives a false signal, the magnitude of which is increase by current flowing through resistor Rig.
Considering a cycle of operation which commences when the output of amplifier A is at -7.5V and rising, the signal at terminal B will be 7.5V and that a terminal A, +12V. As a result the signal at the inverting input of the Cal. sense amplifier of icky. 15 will be -75mV
whereas that at the non-inverting input of the error amplifier will be positive. The internal "high-wins"
diode gate in icky. 15 ensures that only the error I
signal corresponding to the difference between the -75mV input signal and the voltage across Al has any controlling effect. The icky. 15 operates to route fixed frequency variable duration pulses through the ElCl and EKE path within the icky 15. Since transistor Q4 it on as a result of the output of comparator A being +12V, transformer TUB is pulsed so that transistor Q2 is pulsed on and off appropriately. The current level in the winding 10 and 11 is regulated in this way to make the voltage across resistor Al - 75mV.
As the output of amplifier A rises the current in resistor Al is progressively reduced. When the output of amplifier A crosses zero, the output of comparator As changes to -12V so that the signal at the inverting input of the CAL. sense amplifier falls instantaneously to a relatively large negative value whereas that at the non-inverting input of the icky. error amplifier falls to OVA At the same time transistor Q4 switches off and transistor Q3 switches on to cause the pulses from icky. to control Al instead of Q2 and the forward current passed increases as the output of amplifier A
becomes increasingly positive. The inductors Lo and Lo serve to limit the current rise should transistors Al and Q2 become conductive simultaneously for a period during the zero crossing switch-over. Furthermore the windings Lo, Lo, which make up 1:1 transformers (at the switching frequency) with the respective inductors L
and Lo, the diodes Do, Do and the capacitor K3 ensure that motor current is maintained whilst either Al or Q2 is switched off, and is "dumped" in the appropriate supply rail 12 or 13 even at low stepping frequency.
Similarly the current in windings 10 and 11 is controlled during the period when the output of amplifier A is ramping downwardly.
The stepper motor also includes a second pair of windings (not shown) which are to be drive with a current waveform 90 out of phase with that in the windings 10 and a and either lagging or leading depending on the required direction of drive. To this end a second integrating amplifier A, and further comparators A and A are provided. Amplifier A and comparator A provide signals to terminals D and C
which are inputs to another circuit exactly the same as that shown in the upper half of the drawing as described above, which circuit drives the other two motor windings. Amplifier As integrates the signal at the output of photos. Q6 and Q7 which are controlled by the signal at the output of comparator A.
To ensure that the two waveform generator circuits run in the required phase relationship, an photo. Lo- is connected between the output and inverting input terminals of amplifier A to ensure that the integrating capacitor associated therewith is held discharged at certain times The gate of transistor Lo is connected by a resistor R40 to a -12V rail 17. The gate of transistor Al is also connected via a capacitor K4 and a resistor Rho in series to the collector of a pup transistor Ill which has its emitter connected to the rail 14 and its collector connected by a resistor R41 to the rail 17.
The base of transistor Ill is connected by a resistor R42 to the output terminal of amplifier A and also connected to the junction of two resistors R43, R44 in series between the rail 14 and the collector of an nun transistor Q12 The emitter of the transistor Ql2 is grounded and its base is connected to the junction of two resistors R4s, R46 in series between a FEEDERS
terminal and ground. Further the gate of transistor Lo ,' ~æ~æ
is connected by a resistor Rsl and a capacitor Us in series with the drain-source of a field effect transistor Q13 to ground. The gate of transistor Q13 is connected directly to the FWD/RVSE terminal. A resistor Rs2 connects the drain of transistor Q13 to the output of amplifier A.
For forward running the start of the triangular wave at D should coincide with the leading edge of the square wave from amplifier A, whereas far reverse running it should coincide with the trailing edge of that square Dave. The square wave at the output of amplifier A is inverted by transistor Ill When the signal at the FWD/RVSE terminal is high Ill is turned on continuously, thereby preventing it from operating as an inventor, but the photo. Q13 is off. Thus the positive going edges of the square wave output of amplifier A are differentiated by capacitor Us and provide positive going spikes coincident with these edges Jo turn of foe. to Lo The negative spikes created at the trailing edges of the square waves have a effect. When the signal at the FWD/RVSE terminal is low photo. Q13 it on and therefore grounds the pulses arriving via resistor Rs2. Transistor Ill acts as an inventor and the rising edges of the inverted waveform create positive spikes to turn on photo. Lo in synchronism with the trailing edges of the square waves from amplifier Aye The circuit described ensures that no shock loads are applied to the rotor of the motor. The use of a chopper current control to control current with a triangular waveform or other stemless symmetrical waveform overcomes the problem in known stepper motor controls of shock excited "pendulum" type vibration of the rotor. Thus no pull-in and drop-out problems arise from Jo rotor resonances bring excited. The rotor can be stopped in any desired position between the normal stable positions by maintaining the current in the motor windings at the level at which it was flowing at the moment of coming to rest. Controlled acceleration and deceleration of the motor under the control of the computer are easily achieved.
The use of transformer coupling to the output transistors Al and Q2 and the employment of a three rail supply enable the output stage to be made very simple. Only two high power transistors are needed and two diodes Do and Do provide the necessary current recirculation paths, with winding current continuing to flow through the sensing resistor Al.
The integrated circuit 15 employed, although intended for use in power supply regulation, proves to be entirely suitable for stepper motor control and makes the chopper drive circuit extremely simple.
The circuit may also include a current/voltage phase monitor 18 arranged to provide additional current into the summing junction of amplifier Al when the current in resistor Al is out of phase with the voltage at the junction of inductors Lo and Lo. In this way the stepping frequency is reduced if the motor is overloaded.
Turning now to Figure 2, the phase windings 210, 211 of the motor are represented by a single inductor. The current in these windings is controlled by a pair of complementary Frets, Q201 and Q202 connected in series between the power supply rails 212, 213. The windings 210, 211 are connected at one end to the common point of these Frets and at the other end via a current sensing resistor R201 to ground. The Frets Q201 and Q202 are again driven by a PAM modulator icky 215 (TL494), but in this case no isolating transformers are needed.
The Of and C2 outputs of this icky. are connected together (these are open collector outputs), and are connected by a constant current diode D201 as load to a Peter regulated supply (resistor R202~ zoner diodes DZ02 and D203 in series, and a smoothing capacitor K20 connected across the zoner diodes) which is connected between the rail 212 and ground, and also connected by a resistor R203 to the buses of two complementary transistors Q203 and Q204- These transistors have their emitters connected together and have their collectors connected by respective resistors R204, R205 to the rails 212, 213. A pair of complementary Frets Q205~ Q206 which act as drivers for the Frets Q201~ Q202 respectively have their gates connected to respective ones of the collector of transistors Q203. Q204 and have their drain-source paths connected the gates of respective ones of the Frets Q201~ Q203 to the rails 212, 213. The output of Frets Q201.~ Q202 are protected by two zoner diodes D~04, D205 and each FRET R204, R~05 is projected by two zoner diodes D206, D207 and D208~
3209 connected as shown in Figure 2. A capacitor K202 connects the emitter of transistors Q203~ Q204 to the bases thereof to provide for rapid switching on and off of these transistors and, therefore, of the driver Frets Q2G5~ Q206 and the output Frets Q201. Q202- The emitter of the transistors Q203, Q20~ are connected by a resistor R206 id parallel with the series combination of a resistor R237 and a capacitor K203 to the common point of zoner diodes D202 J D203 So as to control the gain/frequency characteristic of the transistor Q20 The V REV output of the icky. 215 is connected by a .
I
resistor R208 to the error amplifier inverting input thereof such input being also connected by a capacitor K204 to the error amplifier output of the icky. 215 and by a resistor R209 to the non-earthy side of the current sensing resistor Ply so as to provide motor current feedback to the icky. 215. The GUT and RUT
terminals of the icky.- 215 are grounded by a capacitor K205 and a resistor R210 respectively. The DEAD TIME
CONTROL input of icky. 215 is connected to a terminal A
and is also connected by a resistor R211 to rail 213 and by a diode D210 to ground.
The non-inverting input of the error amplifier of the icky. 215 is connected by a resistor R212 to the output of an operational amplifier Aye and by a resistor R213 to ground. Amplifier Aye operates in conjunction with an operational amplifier Aye an integrated 8-bit counter and digital-to-analog converter 216 (Ferranti ZN425) and a CMOS analog bilateral switch 217 (lJ4 DG211) as a triangular waveform generator which provides a current demand signal to the pulse width modulator based on icky. 215.
The ANALOG OUTPUT terminal of the converter 216 is connected directly to the non inverting input of amplifier Aye which has its output connected by a resistor R214 to its inverting input so thaw it operates as a unity gain voltage follower. The MOB
output of converter 216 is connected to the control terminal of switch 217 and the signal path of the switch 217 is connected between the output of amplifier Aye and the inverting input of amplifier Allah. The V-REF output of converter 216 is connected directly to the V-REF input thereof and is also connected by a resistor R21s to the non-inverting input of amplifier Allah The output of amplifier Aye is connected by a i' ~2~z~æ
resistor R216 to the inverting input of amplifier A
and a resistor R217 of the same value as resistor R216 is connected between he output of amplifier Aye and its inverting input.
The CLOCK input ox the converter 216 is connected to a suitable source of clock pulses, the frequency of which - determines the stepping rate of the motor. The amplifier Aye operates as a unity gain inverting amplifier or as a voltage follower according to whether the switch 217 is conductive or not. When the switch 217 is conductive, which occurs when the MOB output of converter 216 is high, to. when the analog output is at a voltage higher than half the reference voltage output by V REV terminal of converter 216, the output of amplifier Aye is connected directly to the non-inverting input of amplifier Allah which acts as a unit gain voltage follower. Thus, as the count in the counter of converter 216 increases, the output of amplifier Aye increases linearly. When the switch 217 is non-conductive, the amplifier Aye as a unity gain inverting amplifier so that the output of amplifier Aye decreases linearly as the count in the counter of converter 216 increases. Since this counter operates cyclically, the ANALOG output of converter 216, provides repeated saw tooth waveform, which the amplifier Aye and switch 217 connect into a symmetrical substantially stemless triangular waveform.
A second counter converter 218, a second switch 219 and two amplifiers Aye and Aye are connected similarly to provide a second triangular waveform, which is used for providing a current demand signal to another pulse wave modulation circuit (not shown controlling the other two phase windings of the motor.
I-.'''' The relative phase of the two waveform generators is controlled by a logic, circuit which receives inputs for the second and third MOB outputs of the converter 218 and provides reset pulses periodically to the converter 216. This logic circuit comprises seven RAND
gates Go, to Go. Gate Go has its inputs connected respective to the second and third MOB outputs of converter 218, whereas gate Go has one input connected to the third MOB output and the other connected to the output of gate Go both inputs of which are connoted to the second MOB output to operate as a logic inventor.
Gate Go has one input from the output of gate Go and one from a forward/reverse input terminal 220. Gate Go has one input connected to the output of gate Go and the other connected to the output of gate Go, both inputs of which are connected to the terminal 220. Gate Go has one input from gate Go and one from gate Go and drives a differentiator comprising a capacitor K2G6 a resistor R218 and a diode D211, the output of this differentiator is connected to RESET terminal of converter 216 when the signal on terminal 220 is low (FORWARD) the output of gate Go is in phase with the output of gate Go, i.e. it is high except when both of the second and third ~5B outputs are high. A reset pulse is delivered by the differentiator when the output of gate Go goes low, thereby resetting the converter 216 halfway through the ascending flank of the waveform of generators 218, 219, Aye, Aye similarly, when the signal at terminal 220 is low converter 216 is reset half way through the descending flank of the other waveform.
A simple digital waveform generator as described above has the advantage that the "integrators" constituted by the counter/converter 216 218 have no tendency to drift.
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I
æ
At very low stepping speed the clock can directly connected to a control, computer, thereby enabling very accurate control of the motor shaft position (which fed back to the computer) down to one sixty-fourth of a step). At high stepping rates a digit-to-frequency converter or a rate multiplier can be used to give accurate speed and replacement control, Turning now to Figure 3 a different pulse width modulation circuit (but still using a TL494 integrated circuit) and a different doughtily waveform generator are employed. The waveform generator simply uses a counter 310 the output of which is fed to two ROMs 302 and 303 which store waveform data and provide outputs to two digital-to-analog converters 303, 304. One ROM 303 can store two sets of waveform data to enable the necessary advance/re~ard of the waveform to be obtained for forward and reverse operation. Converter 304 provides a current demand waveform for the pulse width modulator which drives the phase windings 310, 311 of the motor, whereas converter 305 provides a waveform for the other modulator (not shown) for the other phase windings (not shown).
The pulse width modulator shown in Figure 3 utilizes two HEXFETs Q301 and Q302 connected in series with two series inductors L301-, L302 between the supply rails 312 and 313. Protective diodes D301 and D302 are connected across the two H~XFETs Q301 and Q302 respectively. The junction of the two inductors L301, L302 (which are provided to limit the rate of current rise should the conduction periods of the two HEXFETs overlap) is connected by another inductor L303 to one end of windings 310, 311> the other end being grounded via a current sensing resistor R301. The gate of HEXFET
301 is connected to the emitters of a firs pair of complementary driver transistors Q303, Q304, the gate of HEXFET Q302 being connected to the emitter of another pair of couple entry driver transistors Q30s, Q306 The collectors of the transistors Q303, Q304, are connected respectively to the +28V rail 312 and to a -12V rail 314. Similarly the collectors of transistor Q305, Q306 are connected to a -12V rail 315 and the 28V rail 313. the +12V,-12V rails 314, 315 are zoner stabilized, utilizing xenon diodes D303, D304, feed resistors R302, R303 arid smooth capacitors K302, K303 respectively. The transistors Q303, Q304, Q305 and Q306 are controlled by another complementary transistor pair Q307~ Q308 which have their emitters connected to a 4.7V supply provided by a zoner diode D30s in series with a resistor R304 between rail 312 and ground. The collector of transistor Q307 (nun) is connected by two resistors R30s, R306 in series to rail 312 with the junction of these resistors connected to the bases of the transistors Q303, Q304. Similarly two resistors R307, R308 in series connect the collector of transistor Q308 to the rail 313 and the junction of these resistors is connected to the bases of transistors Q305~ Q306- The bases of the transistors Q307~ Q308 are connected together and a capacitor K304 connects them to the emitters of these transistors.
Furthermore a resistor R30g connects the base of transistor Q307, Q308 to the C2 output terminal of icky.
316~ which terminal is connected to rail 312 by a resistor R310. The "current limit" amplifier of icky 316 is not used, its non-inverting input being grounded and its inverting input being connected to the VREF
output thereof. The OUTPUT CONTROL and En terminals are also grounded. The chopping frequency of the icky. 316 is set at about 100 OH by a resistor R311 and a capacitor K30s connecting the RUT and CT terminals of icky. 316 to ground. The error amplifier I
non-inverting input it grounded by a resistor R312.
In toe example shown in Figure 3 the error amplifier of the icky. 316 is used merely as an inverting amplifier stage operating on the signal from a operational amplifier Aye. This receive a its inverting input the current demand signal from the converter 304 via a resistor R313 and a current feedback signal from an operational amplifier Aye via a resistor R314. The non-inverting input of amplifier Aye is grounded via a resistor R31s. Local feedback around amplifier Aye is provided by a capacitor K306 and a resistor R31s in series between the output and inverting input terminals of amplifier Aye, the voltage at the output of amplifier Aye being limited by two relatively reversed zoner diodes D306, D307 in series between the inverting input and the output terminals thereof.
Amplifier Aye acts as a low pass filter operating to filter out the 100 KHz component of the voltage signal generated in the resistor R301 when current is flowing in windings 310, 311. Resistor R301 is connected by resistors R316~ R317 in series to the inverting input of amplifier Aye, the junction of these resistors being connected to ground by a capacitor K307. The non inverting input of amplifier Aye is grounded via a resistor R3l~ and feedback around amplifier Aye is provided by a capacitor K30~3 connected between the output terminal and the inverting input terminal, and by a resistor R3lg connected between the output terminal and thy junction of resistors R316 and R3l7.
The DEAD TIRE CONTROL terminal of i.e. 316 is biassed to a small negative voltage and the inverting input of the error amplifier of icky. 316 is biased to an adjustable negative voltage by means of a resistor I
chain R320. R321, R322. R323 connected between the anode of a 4.7V zoner diode D308 and ground. The cathode of zoner diode D308 is grounded and its emitter is connected by a resistor R324 to the ~12V rail 315.
The resistor R321 is, in fact, a preset potentiometer and has its starter connected by a resistor R32s to the inverting input of the error amplifier of icky. 316. the junction of resistors R322 and R323 is connected to the DEAD TIME CONTROL input. The error amplifier receives its input from operational amplifier Allah via a resistor R326 and local negative feedback is provided by a resistor R327.
In the example shown in Figure 3, the pulse width modulator operates by switching Hexes Q301 and Q302 on alternately at the chopping frequency referred to and thereby maintaining the actual average current in the windings 310, 411 a the desired level set by converter 304.
The arrangement shown in Figure 4 includes an analog waveform generator driving a simple bipolar transistor pulse width modulator.
The windings 410, 411 are connected at one end to the junction of two inductors L401~ L402 connected it series between the collectors of two output transistors Q401, Q402~ and at the other end via a current sensing resistor R401 to ground. Transistor Q401 is a pup transistor and has its emitter connected to the positive supply rail 412, whereas transistor Q402 is an nun transistor which has its emitter connected to the negative supply rail 413~ The transistor Q401. Q402 are controlled by an operational amplifier Aye which has a Load resistor R402 connected between its output terminal and ground. The positive and negative supply terminals of amplifier Aye are connected to rails 412 and 413 by respective resistors R~,03, Roy and are also connected respectively to the bases of the transistors Q401 and Q402. Positive feedback is provided via a resistor R40s, in parallel with the series combination of a resistor R406 and a capacitor K401, between the collector of the transistor Q401 and the non-inverting input of amplifier Aye. Negative feedback is provided by a resistor R407 connected between resistor R4~1 and the inverting input of amplifier Aye, a capacitor K402 connecting this inverting input to the rail 413. A
current demand signal is applied to the non-inverting input of amplifier Aye via a resistor R408 and a resistor R40g connects this non-inverting input to the rail 413.
- The amplifier Aye in fact operates as a voltage comparator. When the voltage at the inverting input is higher than that at the non-inverting input current OOZE from ground through the resistor R402 into the output ox amplifier Aye and hence through resistor R404 to rail 413. Thus transistor Q402 turns on. When the voltage at the inverting input is lower than that at the non-inverting input, transistor Q403 turns on.
Resistor R40s changes the voltage at non-inverting input of amplifier Aye to cause the amplifier Aye to operate in the manner of a Schmidt trigger with upper and lower thresholds linearly dependent on the current demand signal. Current feedback via resistor- R407 shunted by capacitor K402 makes the whole circuit into an oscillator and the inductive load ensures that the charge/discharge rates of capacitor K402 depend on the average current flow in the load so that pulse-width modulation is obtained to regulate the current to the demand value.
I
The current demand signal its derived from an operational amplifier Aye connected as an active integrator having an input resistor R410 and a feedback capacitor K~03. A resistor R411 connects the non-inverting input of amplifier Aye to ground. The output of amplifier Aye is connected by a resistor R412 to the non-inverting input of an amplifier Aye the inverting input of which is connected by a resistor R413 to ground. Two resistors R414 and R41s in series connect the output of amplifier Aye to its non-inverting input, the junction of such resistors being connected to ground by two back-to-back zoner diodes Doyle and D402 in series. The junction of resistors R414 and R41s is also connected by a resistor R416 to the integrator input resistor ~410. Two capacitors K404 and K4Qs are connected by oppositely soled diodes V403, D404 to the junction of resistors R416 and R410, suck capacitors being grounded. An amplifier Aye is connected to ensure that the voltages on capacitors K404 and K40s are equal and opposite. To this end amplifier Aye has its inverting input connected by a resistor R417 to the capacitor K404 and its non-inYerting input grounded via a resistor R41go A
feedback resistor R41g connects the output of amplifier Aye to its inverting input to provide unity gain inverting operation and the output of amplifier Aye is connected to capacitor K40s.
It will be appreciated that the amplifier Aye operates as a Schmidt trigger circuit determining the polarity of the signal applied via the resistor R410 to the integrating amplifier Aye. However, the magnitude of the signal applied to the integrator depends on the voltage for the time hying stored on the capacitors K404, K40s. The circuit thus Ear described therefore operates as a triangular waveform generator, the amplitude of the waveform being fixed, but the frequency being inversely proportional to the voltage stored on the capacitors K404, K405~
A second integrator is provided for generating an identical waveform, suitably phase-shifted, for the other phase windings (not shown) of the motor. This second integrator includes an operational amplifier Assay which has its non-inverting input grounded via a resistor R420. An input resistor R421 for this integrator is connected at one end to the anode of a diode D40s, which ha its cathode connected to the capacitor K404, and to the cathode of a diode D406 which has its anode connected to the capacitor K40s, and at the other end to the inverting input of amplifier Assay. A feedback capacitor K406 is connected to between the output and non-inverting input terminals of the amplifier Assay, the resistor R421- Two zoner diodes D407, D408 connected bac~-to-back are also connected between the output and inverting input terminals of amplifier Assay-The polarity of the signal integrated by amplifier Assess determined by an operational amplifier Aye which is connected to operate as a 2ero-crossing detector. The two inputs of this amplifier Aye are connected by respective resistors R422 and R423 to the output of amplifier Aye. The inverting input is connected by a resistor R424 to ground whereas the non-inverting input is connected by the drain source path of an FRET Q403 to ground. The amplifier Aye operates in inverting or non-inverting mode according to whether the FIT Q403 is conductive or not. The gate of FRET Q403 is connected to a FWD/RVS input terminal 415, the signal at which thus determines the mode of operation of the amplifier Aye.
The output terminal of amplifier Aye is connected by a ..,~
resistor R42s to the anode of a zoner diode Dog, which is connected back-to-back with a zoner diode D410 having its anode connected to ground. A resistor R426 connects the anode of zoner diode Doug to the anodes of the diode D405-Each of the integrators Aye and Assay has a resetting circuit associated with it and these are controlled by 3 single nun transistor Q~04 which has its emitter grounded and its collector connected to the ~15V rail by a resistor R427. The base of this transistor is connected by resistor R428 to the ~15V rail, by a resistor R42g to the capacitor K40s and by a diode D411 to ground, the cathode of diode D411 being connected to the vase of transistor Q404. The resetting circuit associated with amplifier Aye includes an FIT Q40s with its gate connected to the collector of transistor Q404, its drain connected by a resistor R430 to the collector of transistor Q404 and by two bac~-to-back zoner diodes D~12 and D413 to the output of amplifier Aye and its source connected to the inverting input of amplifier Aye FRET Q405 is conductive whenever the transistor Q404 it of which occurs when the voltage on capacitor ~405 is sufficient to hold the base of transistor Q404 low. ID these circumstances the zoner diodes D412 and ~413 determine the peak positive and negative excursion of the output of amplifier Aye instead of the amplifier AGO. The resetting circuit of amplifier Assay is identical and comprises a similarly connected FRET Q406. two zoner diodes D414 and D41s and a resistor Roy .
The voltage on capacitor K404 is limited by an external limiting circuit snot shown) to which it is connected via a PRO SAX terminal 414. a STOP/RUN terminal 416 is connected to the anode of a diode D~16 the cathode of I
which is connected to the cathode of a diode D~17 having its anode connected to the capacitor K404. A
constant current diode D41g connects the cathodes of diodes D416 D~17 to the -15V rail when the signal at the RIJN/STOP terminal is low tube capacitor K404 discharges linearly to zero through the constant current diode D41g. When the signal at the RUN/STOP
diode is high capacitor K404 can charge up vet resistor I and diode D403 from the output of amplifier Aye.
The circuit a 50 includes a stall or slip detector which operates by comparing the phases of the voltage across and current in the winding 410 411. This detector circuit includes an operational amplifier Aye which has its non-inverting input grounded by resistor R43~ and its inverting input connected to the capacitor R402 Of the pulse width modulator circuit. This amplifier Aye detects zero crossings in the average current waveform. Another operational amplifier Aye has its inverting input grounded by a resistor R433 and its oon-inverting input connected by a resistor R434 to the collector of the transistor Q402 and by a capacitor K407 in parallel with a variable resistor --R43s to ground. Resistor R434 and capacitor K407 operates as an averaging filter and amplifier Aye thus detects zero crossings in the average voltage waveform.
The amplifier Aye and Aye have open-collec~or outputs and the output terminals of these are connected together and are connected by a resistor R436 to the rail 4120 These output terminals are also connected by a resistor R437 to the inverting input of an amplifier Ago such input also being connected by a capacitor K408 to ground. The non-inverting input of amplifier Ago is connected to a reference voltage source which supply a reference voltage representing the maximum i torque which the motor can provide without slipping.
The amplifiers Aye and Aye have open-collector outputs and the output terminals of these are connected together and are connected by a resistor R436 to the fall 412. These output terminals are also connected by a resistor R437 Jo the inverting input of an amplifier Ago, such input also being connected by a capacitor K408 to ground. The non-inverting input of amplifier Ago is connected to a reference voltage source which supply a reference voltage represent the maximum torque which the- motor can provide without slipping.
the amplifiers Aye and Aye form a phase detector such that, when the voltage and current waveforms are exactly in phase one or other of the outputs is zero, thereby holding capacitor K408 discharged. As the torque on the motor is increased the phase difference between the current and voltage waveforms increases so that for an increasing proportion of the time the outputs of both amplifies Aye, Aye are high simultaneously. Thus capacitor K408 charges to a voltage which is dependent on the phase-shift, i.e. on the torque load on the motor.
The output of amplifier Ago is connected to a SLIP/STALL terminal which may be connected to a stall indicator. In addition the output of amplifier Ago is connected to the cathode of a diode D41g, the anode of which is connected by a resistor R438 to the capacitor K404- .
In use, as mentioned above when the signal at the STOP/RUN terminal 416 is low capacitor K404 is held discharge so that neither integrator Aye or Aye operates When the signal at terminal 416 goes high the capacitor K404 will start to change from which ever one of the amplifiers Aye, Aye is producing a high output. The signal which is integrated by the amplifiers Aye Aye is thus initially small in magnitude and the rate at which the motor is stepped is therefore correspondingly slow. As the capacitor K404 charges, however, the stepping rate increases until the maximum step rate determined by the transistor Q~04 is reached (or determined by the PRO MAX input if this is lets. The two waveforms produces are maintained 90 out of phase by the operation of amplifier Aye and any drift which occurs in the integrating amplifier Aye, Aye is dealt with automatically by clipping of the waveforms by operation of the resetting circuits referred to (unless the PRO MA control is in use).
Should slip or stall occur the output of amplifier Aye goes tow, causing the capacitor K404 to discharge through the resistor R438 and the diode ~419~ thereby reducing the stepping rate to a- level at which the - output of amplifier Ago goes high, whereupon capacitor K404 will start to recharge.
In all of the circuits described above a waveform generator circuit provides a pair of substantially stemless symmetrical periodic waveforms which provide current demand signals to two pulse width modulation circuits driving the phase windings of the motor.
Provision is made in every case for maintaining a phase difference of 90 (either a lead or a log for forward/reverse control) between the waveforms and the step rate is variable either by changing the frequency of a clock signal in the case of the digital waveform generators, or by varying an analog signal which is integrated in the case of the analog waveform generators. In every case these measures provide smooth and accurate control of the stepper motor and permit running of the motor at higher stepping rates than are usually possible.
.,~
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Claims (16)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A stepper motor control circuit responsive to a variable step rate demand signal, said circuit comprising a wave-form generator circuit arranged to generate a pair of substan-tially stepless symmetrical periodic waveforms of constant ampli-tude and of frequency determined by said variable step rate demand signal received thereby, the waveform being 90° out of phase, a pair of pulse width modulation circuits arranged to drive the motor windings, each modulation circuit receiving one of said waveforms as a current demand signal and a feedback signal related to the instantaneous current in the associated ones of the motor windings, wherein said waveform generator circuit is a triangular waveform generator circuit in which the slopes of the leading and trailing flanks of the waveform are equal during steady speed running of the motor.
2. A stepper motor control ciruit as claimed in claim 1, in which the waveform generator circuit comprises a pair of digital counters clocked by the same clock pulses, a pair of digital-to-analog converters for converting the counter outputs to analog signals and means for resetting one counter at a specific point in the counting cycle of the other counter to maintain the desired 90° phase difference.
3. A stepper motor control circuit as claimed in claim 2 further comprising an amplifier connected to a reference voltage output of the converter and an electronic switch connected to be controlled by the MSB output of the associated counter and providing a switched connection between the analog output of the converter and the amplifier whereby the latter acts as a voltage follower which the MSB output is in one state and as a unity gain inverter when the MSB output is in the other state.
4. A stepper motor control circuit as claimed in claim 1, in which the waveform generator comprises a pair of amplifiers connected as active integraters, signal storage means for storing equal magnitude signals of opposite polarity and connected to the amplifiers to provide the integrand inputs thereto and means sensi-tive to the output of one amplifier for resetting the other ampli-fier to maintain the 90° phase difference between the waveforms.
5. A stepper motor control circuit as claimed in claim 4 further comprising a phase-detector connected to the motor and providing an output indicative of the difference between the phase of the average voltage waveform applied to the motor and the average current waveform flowing in the motor, said phase detector comprising a means for reducing the signals stored in the signal storage means when the phase difference indicative signal exceeds a predetermined limit.
6. A stepper motor control circuit responsive to a variable step rate demand signal, said circuit comprising a wave-form generator circuit arranged to generate a pair of substantially stepless symmetrical periodic waveforms of constant amplitude and of frequency determined by said variable step rate demand signal received thereby, the waveforms being 90° out of phase, a pair of pulse width modulation circuits arranged to drive the motor wind-ings, each modulation circuit receiving one of said waveforms as a current demand signal and a feedback signal related to the in-stantaneous current in the associated ones of the motor windings, wherein each pulse width modulator has an output stage operating in push-pull between posi-tive and negative supply rails at a frequency at least an order of magnitude higher than the maximum required stepping frequency.
7. A stepper motor control circuit as claimed in claim 6, in which the motor windings are connected in series with current sensing resistor means between the output stage and an earth return.
8. A stepper motor control circuit as claimed in claim 7, in which the output stage comprises a complementary pair of power FETs.
9. A stepper motor control circuit as claimed in claim 8, in which said power FETs are multi-cell FETs.
10. A stepper motor control circuit as claimed in claim 9, in which said power FETs are HEXFETs.
11. A stepper motor control circuit as claimed in claim 7, in which the output stage comprises a complementary pair of bipolar transistors
12. A stepper motor control circuit as claimed in claim 11, in which the pulse width modulator also comprises an opera-tional amplifier having its power input terminals connected to the bases of the respective transistor and its output terminal con-nected by a load resistor to ground.
13. A stepper motor control circuit as claimed in claim 12 further comprising an input resistor connecting an output of the waveform generator circuit to the non-inverting input of the operational amplifier, a voltage feedback circuit connecting the output of the output stage to the non-inverting input of the opera-tional amplifier, a current feedback resistor for connecting the current sensing resistor to the inverting input of the operational amplifier and a capacitor connecting the inverting input to the negative supply.
14. A stepper motor control circuit comprising a wave-form generator circuit arranged to generate a pair of substan-tially stepless symmetrical periodic waveforms of constant ampli-tude and of frequency determined by a variable step rate demand signal received thereby, the waveform being 90° out of phase, a pair of pulse width modulation circuits arranged to drive the motor windings, each modulation circuit receiving one of said wave-forms as a current demand signal and a feedback signal related to the instantaneous current in the associated ones of the motor windings, a phase detector circuit connected to said modulation circuit and operating to provide a signal related to the difference between the phases of the voltage applied to and the current flow-ing in the motor, and means connected to said phase detector cir-cuit and to said waveform generator circuit to reduce the fre-quency of the waveforms independently of said step rate demand signal when a predetermined out of phase condition is detected by said detector circuit.
15. A stepper motor control circuit as claimed in claim 14, in which said waveform generator circuit comprises a pair of amplifiers connected as active integrators, signal storage means for storing equal magnitude signals of opposite polarity and con-nected to the amplifiers to provide the integrand inputs thereto and means sensitive to the output of one amplifier for resetting the other amplifier to maintain the 90° phase difference between said waveforms.
16. A stepper motor control circuit as claimed in claim 15 further comprising a phase detector connected to the motor and providing an output indicative of the difference between the phases of the average voltage waveform provided to the motor and the average current waveform flowing in the motor, said phase detector comprising a means for reducing the signals stored in the signal storage means when the phase difference indicative signal exceeds a predetermined limit.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB8202913 | 1982-02-02 | ||
| GB8202913 | 1982-02-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1212412A true CA1212412A (en) | 1986-10-07 |
Family
ID=10528043
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000420712A Expired CA1212412A (en) | 1982-02-02 | 1983-02-01 | Stepper motor control circuit |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4587473A (en) |
| EP (1) | EP0099918B1 (en) |
| JP (1) | JPS59500496A (en) |
| CA (1) | CA1212412A (en) |
| DE (1) | DE3365939D1 (en) |
| WO (1) | WO1983002695A1 (en) |
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|---|---|---|---|---|
| JPS4971412A (en) * | 1972-11-14 | 1974-07-10 | ||
| DE2308056B2 (en) * | 1973-02-19 | 1979-07-26 | Kienzle Uhrenfabriken Gmbh, 7220 Schwenningen | Control circuit for the step-by-step operation of an electric motor |
| DE2361003A1 (en) * | 1973-12-07 | 1975-06-19 | Licentia Gmbh | Multiphase stepper motor control circuit - giving rapid build up and decay of field current |
| JPS5479415A (en) * | 1977-12-08 | 1979-06-25 | Janome Sewing Machine Co Ltd | Pulse motor driving circuit |
| US4255693A (en) * | 1979-10-29 | 1981-03-10 | International Business Machines Corporation | Closed loop stepper motor circuitry without encoder |
-
1983
- 1983-02-01 CA CA000420712A patent/CA1212412A/en not_active Expired
- 1983-02-02 JP JP58500756A patent/JPS59500496A/en active Granted
- 1983-02-02 EP EP83900722A patent/EP0099918B1/en not_active Expired
- 1983-02-02 WO PCT/GB1983/000027 patent/WO1983002695A1/en active IP Right Grant
- 1983-02-02 DE DE8383900722T patent/DE3365939D1/en not_active Expired
- 1983-02-02 US US06/541,344 patent/US4587473A/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| WO1983002695A1 (en) | 1983-08-04 |
| DE3365939D1 (en) | 1986-10-16 |
| US4587473A (en) | 1986-05-06 |
| JPH0326037B2 (en) | 1991-04-09 |
| EP0099918A1 (en) | 1984-02-08 |
| EP0099918B1 (en) | 1986-09-10 |
| JPS59500496A (en) | 1984-03-22 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKEX | Expiry |