TW202101188A - High resolution touch sensor apparatus and method - Google Patents

High resolution touch sensor apparatus and method Download PDF

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TW202101188A
TW202101188A TW109106782A TW109106782A TW202101188A TW 202101188 A TW202101188 A TW 202101188A TW 109106782 A TW109106782 A TW 109106782A TW 109106782 A TW109106782 A TW 109106782A TW 202101188 A TW202101188 A TW 202101188A
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vci
voltage
reset
pixel
reference capacitor
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亨里克斯 德克斯
威廉默斯 范里爾
科溫 麥克 阿
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英商拜耳梅特克斯觸控有限公司
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0446Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416Control or interface arrangements specially adapted for digitisers
    • G06F3/04164Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06VIMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12Fingerprints or palmprints
    • G06V40/13Sensors therefor
    • G06V40/1306Sensors therefor non-optical, e.g. ultrasonic or capacitive sensing
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/94Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the way in which the control signals are generated
    • H03K17/96Touch switches
    • H03K17/962Capacitive touch switches

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  • Physics & Mathematics (AREA)
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Abstract

A sensor array (10) comprising a plurality of touch sensitive pixels, each pixel (12) comprising a capacitive sensing electrode (14) and a reference capacitor (16) connected in series with the capacitive sensing electrode (14) to provide an indicator voltage that is indicative of the proximity of a conductive object to be sensed.

Description

高解析觸碰感應裝置及方法High-resolution touch sensing device and method

本發明係有關於裝置與方法,特別是有關於觸碰感應表面、從此等表面控制與獲得信號的方法,以及製造此等表面的方法。The present invention relates to devices and methods, in particular to methods of touching sensing surfaces, controlling and obtaining signals from such surfaces, and methods of manufacturing such surfaces.

使用者身份的安全與驗證認證是整體科技越來越重要的一部分;舉幾個例子,它參與了:The security and verification of user identity is an increasingly important part of the overall technology; to give a few examples, it has participated in:

.使用於通訊與使用者訪問媒體內容的用戶設備(UE);. User equipment (UE) used for communication and user access to media content;

.儲存與提供接觸到敏感資料的電腦裝置與系統;. Computer devices and systems that store and provide access to sensitive information;

.使用於金融交易、大樓存取控制的裝置與系統;及. Devices and systems used in financial transactions and building access control; and

.車輛的存取控制。. Access control for vehicles.

現在,使用者的生物特徵測量在全部的這些與其他環境中是普遍的;生物特徵測量,例如虹膜掃描與人臉辨識係依賴於照明與攝影機的視野;藉由呈現使用者的影片或照片給攝影機以規避如此的安全措施也是可能的。Now, the user’s biometric measurement is common in all these and other environments; biometric measurements, such as iris scanning and face recognition, rely on lighting and the camera’s field of view; by presenting users’ videos or photos It is also possible for the camera to circumvent such security measures.

複數的指紋感應器已被認為是較為安全的,但克服它們提供的安全性也是可能的,且如此的感應器的製造要求使它們與其他電子裝置,例如行動電話與其他UE,整合在一起是困難的;尤其是,指紋感應需要非常高的解析度-至少是每英吋數百像素。Multiple fingerprint sensors have been considered safer, but it is possible to overcome the security they provide. The manufacturing requirements of such sensors make them integrated with other electronic devices, such as mobile phones and other UEs. Difficult; especially, fingerprint sensing requires very high resolution-at least hundreds of pixels per inch.

如此的感應器的一個例子是蘋果公司的觸碰ID(RTM);此感應器係基於雷射切割藍寶石水晶,其使用一個偵測環圍繞該感應器以偵測使用者的手指的存在;該觸碰ID(RTM)感應器使用電容式觸碰感應以偵測指紋,且具有500每英吋像素(PPI)解析度。An example of such a sensor is Apple’s Touch ID (RTM); this sensor is based on laser-cut sapphire crystal, which uses a detection ring to surround the sensor to detect the presence of the user’s finger; The touch ID (RTM) sensor uses capacitive touch sensing to detect fingerprints and has a resolution of 500 pixels per inch (PPI).

電容式感應器,例如那些使用與指紋的表面輪廓相關聯的電容性效應的電容式感應器,每個感應器陣列像素包含擔任一電容的一極板的一電極、擔任另一極板的真皮層(dermal layer,係為導電的)以及擔任一介電質的非導電性表皮層(epidermal layer)。真皮(dermis)越靠近像素電極的地方,電容量越大,所以皮膚的表面輪廓可藉由測量每個像素的電容量(例如,基於累積在像素電極上的電荷)及彙編來自該些像素的影像而被感應。Capacitive sensors, such as those that use the capacitive effect associated with the surface profile of the fingerprint. Each sensor array pixel includes an electrode that serves as one plate of a capacitor and a leather that serves as the other plate. The dermal layer, which is conductive, and the non-conductive epidermal layer that acts as a dielectric. The closer the dermis is to the pixel electrode, the greater the capacitance, so the surface contour of the skin can be measured by measuring the capacitance of each pixel (for example, based on the charge accumulated on the pixel electrode) and compiling the data from these pixels. The image is sensed.

被動式矩陣與主動式矩陣電容式觸碰感應器都已被提出了。大部分所謂的被動式電容式觸碰感應系統使用一外部的驅動電路(例如一積體電路、IC)以驅動被動電極的矩陣,且使用一單獨的讀出電路(例如一IC)以在該驅動週期期間讀出儲存在這些電極上的電荷;儲存的電荷係依賴於由於觸碰事件造成的微小的電容量改變而改變;被動電極系統對環境雜訊與干擾是敏感的。Both passive matrix and active matrix capacitive touch sensors have been proposed. Most so-called passive capacitive touch sensing systems use an external drive circuit (such as an integrated circuit, IC) to drive the matrix of passive electrodes, and use a separate readout circuit (such as an IC) to drive the The charge stored on these electrodes is read out during the period; the stored charge changes depending on the small capacitance change caused by the touch event; the passive electrode system is sensitive to environmental noise and interference.

主動式矩陣電容式觸碰感應器包含在每個像素的一開關元件;該開關元件可控制介於該像素的該電容式感應電極及連至一讀出電路的一類比轉數位轉換器(ADC)的一輸入通道之間的一傳導路徑;一般來說,一主動式陣列的像素的每行係連接至一個如此的輸入通道;因此,儲存在該陣列的電荷可從該主動式矩陣藉由控制該些開關元件以連接該些像素的每列而一對一的被讀出至該ADC。The active matrix capacitive touch sensor includes a switch element in each pixel; the switch element can control the capacitive sensing electrode between the pixel and an analog to digital converter (ADC) connected to a readout circuit. ) Is a conduction path between an input channel; generally, each row of pixels in an active array is connected to one such input channel; therefore, the charge stored in the array can be obtained from the active matrix by The switching elements are controlled to connect each column of the pixels to be read out to the ADC one to one.

每個像素需要連接至該讀出電路,每行的所有像素實際上為並聯連接;與每個像素有關係的寄生電容因而附加地結合;這設置了一個固有的限制在任一行的可被結合在一起的像素的數量;這轉而限制了電容式觸碰感應器的大小及/或解析度。Each pixel needs to be connected to the readout circuit, and all pixels in each row are actually connected in parallel; the parasitic capacitances associated with each pixel are thus additionally combined; this sets an inherent restriction that any row can be combined in The number of pixels together; this in turn limits the size and/or resolution of the capacitive touch sensor.

因此,對於大面積高解析觸碰感應器來說,那依然有值得注意的未滿足的商業需要。Therefore, for large-area high-resolution touch sensors, there are still notable unmet commercial needs.

本發明之方面和例子被提出於請求項內並且目標在於設法解決至少一部分的上述技術問題與其他問題。The aspects and examples of the present invention are proposed in the claim and the goal is to try to solve at least part of the above technical problems and other problems.

在一方面,有提供一感應器陣列,包含複數之觸碰感應像素,每個像素包含:一電容式感應電極以累積一電荷以回應感應到一導電物體的接近;一參考電容,與該電容式感應電極串聯連接,使得回應一控制電壓,在介於該參考電容及該電容式感應電極之間的連接點(18)提供一指示電壓,以指出感應到該導電物體的接近。此安排可減少或克服存在於先前技術的觸碰感應器的與寄生電容有關連的問題。In one aspect, a sensor array is provided, including a plurality of touch sensing pixels, each pixel includes: a capacitive sensing electrode to accumulate a charge in response to sensing the proximity of a conductive object; a reference capacitor, and the capacitor The type sensing electrodes are connected in series, so that in response to a control voltage, an indicator voltage is provided at the connection point (18) between the reference capacitor and the capacitive sensing electrode to indicate the proximity of the conductive object. This arrangement can reduce or overcome the problems related to parasitic capacitance existing in the touch sensor of the prior art.

每個像素可包含一感應VCI(電壓控制阻抗),具有連接的一控制端,使得該感應VCI的阻抗被該指示電壓所控制。一般來說,該感應VCI包含至少一TFT(薄膜電晶體),且該VCI的傳導路徑包含該TFT的通道。該感應VCI的傳導路徑可連接至該參考電容(16)的一第一極板,且該第一VCI的該控制端係連接至該參考電容的該第二極板。該參考電容的至少一極板可由提供該感應VCI的一薄膜結構的一金屬鹽(metallisation)層所提供。Each pixel may include a sensing VCI (Voltage Controlled Impedance) with a control terminal connected so that the impedance of the sensing VCI is controlled by the indicator voltage. Generally, the sensing VCI includes at least one TFT (thin film transistor), and the conduction path of the VCI includes a channel of the TFT. The conductive path of the sensing VCI can be connected to a first plate of the reference capacitor (16), and the control terminal of the first VCI is connected to the second plate of the reference capacitor. At least one plate of the reference capacitor can be provided by a metallisation layer of a thin film structure that provides the sensing VCI.

該感應VCI的該傳導路徑可連接該參考電容的該第一極板,且如此亦連接該控制電壓,至一讀出電路的一輸入;這可致能提供該控制電壓的也是提供該像素的該輸出信號的基礎的電路;這可進一步地解決與寄生電容及先前技術觸碰感應器的信號對雜訊比相關連的問題。另一種解決此相同問題的方式是使該感應VCI的該傳導路徑連接一參考信號供應器至一讀出電路的一輸入;該參考信號供應器可包含一恆電壓電流源;因此,調節一像素的該感應VCI的阻抗控制了從該像素至該讀出電路的該輸入的電流。The conductive path of the sensing VCI can be connected to the first plate of the reference capacitor, and in this way, the control voltage is also connected to an input of a readout circuit; this can enable the control voltage to be provided by the pixel The basic circuit of the output signal; this can further solve the problems related to the parasitic capacitance and the signal-to-noise ratio of the prior art touch sensor. Another way to solve the same problem is to connect the conductive path of the sensing VCI to a reference signal supplier to an input of a readout circuit; the reference signal supplier may include a constant voltage current source; therefore, adjust a pixel The impedance of the sensing VCI controls the current from the pixel to the input of the readout circuit.

一選擇VCI亦可被包含在每個像素內;這可被連接使得它的傳導路徑介於該感應VCI的該傳導路徑與該參考信號供應器之間串聯連接;因此,切換該選擇VCI進入一非導通狀態可從該參考信號輸入隔離該感應VCI,然而切換該選擇VCI進入一導通狀態可使電流流過該像素(取決於該感應VCI的該阻抗)。該選擇VCI的一控制端可連接以接收該控制電壓,例如,從一閘極驅動電路。A selection VCI can also be included in each pixel; this can be connected so that its conduction path is connected in series between the conduction path of the sensing VCI and the reference signal supplier; therefore, switching the selection VCI into a The non-conduction state can isolate the sensing VCI from the reference signal input, but switching the selected VCI into a conduction state allows current to flow through the pixel (depending on the impedance of the sensing VCI). A control terminal of the selection VCI can be connected to receive the control voltage, for example, from a gate drive circuit.

每個像素可包含一重置電路以設定該感應VCI的該控制端(22)至一選定的重置電壓;該重置電路可包含一重置VCI;該重置VCI的一傳導路徑連接介於該參考電容的一第二極板與(a)一重置電壓;與(b)該參考電容的一第一極板的其中之一之間。該重置VCI的一控制端(32)可連接至該感應器的另一個像素以接收一重置信號(例如,從該陣列的另一列的一像素的該選擇VCI的連接至該控制端的一閘極驅動電路的一通道);該重置信號可被配置為切換該重置VCI進入一導通狀態,從而連接該參考電容的該第二極板至(a)該重置電壓及(b)該電容的該第一極板的其中之一。連接該參考電容的該第二極板至(a)該重置電壓的其中之一。Each pixel may include a reset circuit to set the control terminal (22) of the sensing VCI to a selected reset voltage; the reset circuit may include a reset VCI; a conductive path connecting the reset VCI Between a second plate of the reference capacitor and (a) a reset voltage; and (b) one of a first plate of the reference capacitor. A control terminal (32) of the reset VCI can be connected to another pixel of the sensor to receive a reset signal (for example, from the selection VCI of a pixel in another column of the array connected to a control terminal A channel of the gate drive circuit); the reset signal can be configured to switch the reset VCI into a conducting state, thereby connecting the second plate of the reference capacitor to (a) the reset voltage and (b) One of the first plates of the capacitor. Connect the second plate of the reference capacitor to (a) one of the reset voltages.

每個像素可包含一閘極線VCI,而該閘極線VCI的一傳導路徑可連接該參考信號供應器至該參考電容的該第一極板以提供該控制電壓。Each pixel may include a gate line VCI, and a conductive path of the gate line VCI may connect the reference signal supplier to the first plate of the reference capacitor to provide the control voltage.

一個方面亦提供操作一感應器陣列的一方法,該感應器陣列包含複數之觸碰感應像素,該方法包含:施加一控制電壓至該感應器之一像素之一參考電容以充電該參考電容及一電容式感應電極,其中回應該控制電壓,該參考電容及該電容式感應電極一起提供一指示電壓以指示該像素感應到一導電物體的接近。One aspect also provides a method of operating a sensor array, the sensor array including a plurality of touch sensing pixels, the method including: applying a control voltage to a reference capacitor of a pixel of the sensor to charge the reference capacitor, and A capacitive sensing electrode, in which the control voltage is responded to, and the reference capacitor and the capacitive sensing electrode together provide an indication voltage to indicate that the pixel senses the proximity of a conductive object.

該指示電壓可被使用以控制連接至一讀出電路之一輸入通道的一感應VCI之一傳導路徑之該阻抗;該控制電壓可藉由一閘極驅動電路之一輸出通道所提供,且該閘極驅動電路之該輸出通道可經由該感應VCI之該傳導路徑連接至該讀出電路之該輸入通道。該方法可包含操作該感應VCI以調節介於該閘極驅動電路之該輸出通道與該讀電路之該輸入通道之間的一傳導路徑之該阻抗;這可幫助解決與寄生電容相關連的問題,其中寄生電容係來自於相同行的其他像素,得自來自該活動的像素的覆没信號(swamping signal)。當一參考信號供應器藉由該感應VCI之該傳導路徑連接至該讀出電路之該輸入通道時,提供了解決這相同技術問題的另一種方式。在那些具體實施例當中,該方法可包含操作該感應VCI以調節介於該參考信號供應器與該讀出電路之該輸入通道之間的一傳導路徑之該阻抗。The indication voltage can be used to control the impedance of a conductive path of an inductive VCI connected to an input channel of a readout circuit; the control voltage can be provided by an output channel of a gate drive circuit, and the The output channel of the gate drive circuit can be connected to the input channel of the readout circuit via the conduction path of the inductive VCI. The method may include operating the inductive VCI to adjust the impedance of a conduction path between the output channel of the gate drive circuit and the input channel of the read circuit; this can help solve problems associated with parasitic capacitance , Where the parasitic capacitance comes from other pixels in the same row, and comes from the swamping signal of the active pixel. When a reference signal supplier is connected to the input channel of the readout circuit through the conductive path of the sensing VCI, another way to solve the same technical problem is provided. In those embodiments, the method may include operating the inductive VCI to adjust the impedance of a conductive path between the reference signal supplier and the input channel of the readout circuit.

該方法可包含操作一閘極線VCI以藉由經由該閘極線VCI之一傳導路徑連接該參考信號供應器至該參考電容以提供該控制電壓。The method may include operating a gate line VCI to provide the control voltage by connecting the reference signal supplier to the reference capacitor through a conductive path of the gate line VCI.

該方法可包含在該控制電壓的一個隨後的應用之前重置該參考電容;重置該參考電容可包含使用一控制電壓操作一重置電路,其中該控制電壓亦施加至該感應器陣列的另一像素-例如被使用來激活該陣列的該些像素的另一列的一控制電壓。The method may include resetting the reference capacitor before a subsequent application of the control voltage; resetting the reference capacitor may include operating a reset circuit using a control voltage, wherein the control voltage is also applied to another of the sensor array A pixel-for example a control voltage used to activate another column of the pixels of the array.

重置該參考電容可包含操作一重置VCI以連接該參考電容的一第一極板至:(a)一重置電壓;及(b)該參考電容的一第二極板的其中之一。重置該參考電容可包含使該參考電容的該第一與第二極板彼此連接。Resetting the reference capacitor may include operating a reset VCI to connect a first plate of the reference capacitor to: (a) a reset voltage; and (b) one of a second plate of the reference capacitor . Resetting the reference capacitor may include connecting the first and second plates of the reference capacitor to each other.

一個方面亦提供一個別的像素,包含:一電容式感應電極以累積一電荷以回應感應到一導電物體的接近;一參考電容,與該電容式感應電極串聯連接,使得回應一控制電壓,在介於該參考電容及該電容式感應電極之間的連接點(18)提供一指示電壓,以指出感應到該導電物體的接近。具體實施例可提供一群這樣的像素,例如可提供如此的一陣列的一元件部分。One aspect also provides another pixel, including: a capacitive sensing electrode to accumulate a charge in response to sensing the proximity of a conductive object; a reference capacitor connected in series with the capacitive sensing electrode to respond to a control voltage, The connection point (18) between the reference capacitor and the capacitive sensing electrode provides an indicator voltage to indicate the proximity of the conductive object. Specific embodiments may provide a group of such pixels, for example, may provide a component part of such an array.

為了避免產生疑問,本申請的揭露要以整體觀之;在此揭露的任何例子的任何特徵可與在此描述的任何其他例子的任何選擇的特徵結合。In order to avoid any doubt, the disclosure of this application should be viewed as a whole; any feature of any example disclosed herein can be combined with any selected feature of any other example described herein.

例如,方法的特徵可用適當地配置的硬體實施,且於此描述的該特定的硬體的功能可用在使用其他硬體實施相同功能的方法。For example, the features of the method can be implemented by appropriately configured hardware, and the function of the specific hardware described herein can be used in a method that uses other hardware to implement the same function.

圖1顯示一感應裝置1,包含本揭露之該感應器陣列10;圖2說明一個如此的感應器陣列10的一電路圖。以下的說明應該一起參考圖1與圖2;從圖1與圖2的檢視可以看出,圖1的插圖A顯示此陣列10的一像素的一詳細視圖。FIG. 1 shows a sensing device 1 including the sensor array 10 of the present disclosure; FIG. 2 illustrates a circuit diagram of such a sensor array 10. The following description should refer to FIGS. 1 and 2 together; from the inspection of FIGS. 1 and 2, it can be seen that the inset A of FIG. 1 shows a detailed view of a pixel of the array 10.

該感應器陣列10包含複數之觸碰感應像素12;一般來說,除了關於其在該陣列的位置之外,每個像素12與其他在該陣列10的像素12相同。如圖所示,每個像素12包含一電容式感應電極14,以累積一電荷以回應感應到一導電物體的表面的接近;一參考電容16係連接於該電容式感應電極14與連接至一閘極驅動電路24的一閘極驅動通道24-1的一連接點之間;因此,該參考電容16的一第一極板係連接至該閘極驅動通道24-1,且該參考電容16的一第二極板係連接至該電容式感應電極14。The sensor array 10 includes a plurality of touch-sensitive pixels 12; in general, each pixel 12 is the same as other pixels 12 in the array 10 except for its position in the array. As shown in the figure, each pixel 12 includes a capacitive sensing electrode 14 to accumulate a charge in response to the proximity of the surface of a conductive object; a reference capacitor 16 is connected to the capacitive sensing electrode 14 and connected to a Between a connection point of a gate drive channel 24-1 of the gate drive circuit 24; therefore, a first plate of the reference capacitor 16 is connected to the gate drive channel 24-1, and the reference capacitor 16 A second electrode plate of is connected to the capacitive sensing electrode 14.

每個像素12亦可包含一感應VCI(電壓控制阻抗)20,該感應VCI 20具有一傳導路徑及一控制端(22;圖1的插圖A)以控制該傳導路徑的該阻抗;該感應VCI 20之該傳導路徑可連接該閘極驅動通道24-1至該像素12之一輸出;該VCI的該控制端22係連接至該電容式感應電極14以及該參考電容16之該第二極板;因此,回應由該閘極驅動通道24-1所施加之一控制電壓,該參考電容16及該電容式感應電極14擔當起一電容式分電位器(capacitive potential divider)。Each pixel 12 may also include a sensing VCI (Voltage Controlled Impedance) 20. The sensing VCI 20 has a conduction path and a control terminal (22; inset A of FIG. 1) to control the impedance of the conduction path; the sensing VCI The conductive path 20 can connect the gate drive channel 24-1 to an output of the pixel 12; the control terminal 22 of the VCI is connected to the capacitive sensing electrode 14 and the second plate of the reference capacitor 16 Therefore, in response to a control voltage applied by the gate drive channel 24-1, the reference capacitor 16 and the capacitive sensing electrode 14 act as a capacitive potential divider (capacitive potential divider).

該電容式感應電極14的電容量係取決於感應到的一物體的一導電表面的向該電容式感應電極14的接近程度;因此,當一控制電壓被施加到該參考電容16的該第一極板時,介於該感應電極14與該參考電容16之間的相對部份電壓係提供向該電容式感應電極14的該導電物體的該表面的接近的指示。該控制電壓的這部份係提供一指示電壓,該指示電壓係位於介於該參考電容16與該電容式感應電極14之間的該連接點18;此指示電壓可施加在該感應VCI 20的該控制端22以從指出該導電物體的接近的該像素12提供一輸出。The capacitance of the capacitive sensing electrode 14 depends on the proximity of a conductive surface of an object sensed to the capacitive sensing electrode 14; therefore, when a control voltage is applied to the first reference capacitor 16 In the case of a polar plate, the relative partial voltage between the sensing electrode 14 and the reference capacitor 16 provides an indication of the proximity of the surface of the conductive object of the capacitive sensing electrode 14. This part of the control voltage provides an indicator voltage, which is located at the connection point 18 between the reference capacitor 16 and the capacitive sensing electrode 14; the indicator voltage can be applied to the sensing VCI 20 The control terminal 22 provides an output from the pixel 12 indicating the proximity of the conductive object.

複數之像素可被充分地接近在一起放置以能夠決定皮膚的輪廓,例如那些關於表皮脊的,例如那些出現在一指紋、掌紋或其他身體的識別的表面;本揭露的上下文將被理解為皮膚的輪廓可包含複數之脊部與介於那些脊部之間的複數之凹部。在觸碰感應的期間,該些脊部可比介於那些脊部之間的該些”凹部”相對地更靠近一感應電極;因此,鄰近一脊部的一感應電極的電容量將會高於鄰近一凹部的一感應電極的電容量。以下描述解釋了如何能提供這樣的系統:在比先前可能的更大的區域提供足夠高的解析的感應器以執行指紋與其他生物特徵觸碰感應。Plural pixels can be placed sufficiently close together to be able to determine the contours of the skin, such as those related to epidermal ridges, such as those that appear on a fingerprint, palmprint, or other recognized surface of the body; the context of this disclosure will be understood as skin The outline of can include a plurality of ridges and a plurality of recesses between those ridges. During the touch sensing period, the ridges can be relatively closer to a sensing electrode than the "concavities" between those ridges; therefore, the capacitance of a sensing electrode adjacent to a ridge will be higher than The capacitance of a sensing electrode adjacent to a recess. The following description explains how such a system can be provided: a sensor with a sufficiently high resolution is provided in a larger area than previously possible to perform fingerprint and other biometric touch sensing.

如圖1與圖2所示,除了該感應器陣列10之外,如此的一個感應器亦可包含一介電質屏蔽8、一閘極驅動電路24及一讀出電路26;亦可包含連接至一主機裝置的一連接器25,其可藉由具有複數之導線的一多通道連接器所提供,可為可撓式的,且可包含例如一彈性的或可彎曲PCB、一帶狀纜線或類似的連接器;該連接器25可承載一主機介面27,例如一插頭或插座,以連接在該連接器內的該些導線至一主機裝置的複數之信號通道,其中該主機裝置包含該感應裝置1。As shown in FIGS. 1 and 2, in addition to the sensor array 10, such an inductor may also include a dielectric shield 8, a gate drive circuit 24, and a readout circuit 26; it may also include connections A connector 25 to a host device, which can be provided by a multi-channel connector with a plurality of wires, can be flexible, and can include, for example, a flexible or bendable PCB, a ribbon cable Cable or similar connector; the connector 25 can carry a host interface 27, such as a plug or socket, to connect the wires in the connector to a plurality of signal channels of a host device, wherein the host device includes The induction device1.

該主機介面27由該連接器25連接至該讀出電路26。一控制器(6;圖2)可連接至該閘極驅動電路24以操作該感應器陣列,並連接至該讀出電路26以得到表示該感應器陣列10的像素的自電容的信號。The host interface 27 is connected to the readout circuit 26 by the connector 25. A controller (6; FIG. 2) can be connected to the gate drive circuit 24 to operate the sensor array, and connected to the readout circuit 26 to obtain a signal representing the self-capacitance of the pixels of the sensor array 10.

該介電質屏蔽8通常為一張絕緣材料的形式,該絕緣材料可為透明且可撓的,例如一聚合物或玻璃;該介電質屏蔽8可為可撓的且可為彎曲的;此屏蔽的一”活動區域”(active area)覆蓋在該感應器陣列10上。在一些具體實施例當中,該些VCI與其他像素元件係設置於一單獨的基板上,且該屏蔽8覆蓋在在其基板上的這些元件上;在其他的具體實施例當中,該屏蔽8為這些元件提供該基板。The dielectric shield 8 is usually in the form of a sheet of insulating material, the insulating material may be transparent and flexible, such as a polymer or glass; the dielectric shield 8 may be flexible and bendable; An “active area” of this shielding covers the sensor array 10. In some specific embodiments, the VCI and other pixel elements are arranged on a separate substrate, and the shield 8 covers the elements on the substrate; in other specific embodiments, the shield 8 is These components provide the substrate.

該感應器陣列10可採取在此討論的多樣化形式的任何一種;可使用不同的像素設計,然而,通常該些像素12包含至少一電容式感應電極14、一參考電容16與至少一感應VCI 20。The sensor array 10 can take any of the diversified forms discussed here; different pixel designs can be used, however, usually the pixels 12 include at least one capacitive sensing electrode 14, a reference capacitor 16, and at least one sensing VCI 20.

圖2所說明的該陣列包含複數之列的像素,例如圖1所說明的那樣。圖2亦顯示該閘極驅動電路24、該讀出電路26及一控制器6;該控制器6被配置為提供一時脈信號,例如一週期性觸發,至該閘極驅動電路24及該讀出電路26。The array illustrated in FIG. 2 includes a plurality of columns of pixels, such as that illustrated in FIG. 1. 2 also shows the gate drive circuit 24, the readout circuit 26, and a controller 6. The controller 6 is configured to provide a clock signal, such as a periodic trigger, to the gate drive circuit 24 and the readout出circuit 26.

該閘極驅動電路24包含複數之可操作以個別地(亦即,獨立地)控制的閘極驅動通道24-1、24-2、24-3,每個如此的閘極驅動通道24-1、24-2、24-3包含設置以提供一控制電壓輸出的一電壓源,且每個通道24-1係連接至該感應器陣列10的一對應的列的像素12。圖2所示的配置當中,每個閘極驅動通道24-1、24-2、24-3係連接至該感應器陣列10的其列的每個像素12的該參考電容16的該第一極板。在每個時脈週期期間,該閘極驅動電路24被配置為藉由施加一閘極驅動脈波至該些像素以激活該些閘極驅動通道24-1、24-2、24-3的其中之一;因此,經過一連串的週期,該些通道(以及因此該些列)依次被激活,且從在此序列的一步移動至下一個,以回應來自於該控制器6的該時脈週期。The gate drive circuit 24 includes a plurality of gate drive channels 24-1, 24-2, 24-3 that are operable to individually (that is, independently) control, each such gate drive channel 24-1 , 24-2, 24-3 include a voltage source configured to provide a control voltage output, and each channel 24-1 is connected to a corresponding column of pixels 12 of the sensor array 10. In the configuration shown in FIG. 2, each gate drive channel 24-1, 24-2, 24-3 is connected to the first reference capacitor 16 of each pixel 12 of the sensor array 10 Pole plate. During each clock cycle, the gate driving circuit 24 is configured to activate the gate driving channels 24-1, 24-2, and 24-3 by applying a gate driving pulse to the pixels. One of them; therefore, after a series of cycles, the channels (and therefore the columns) are activated in turn and move from one step in the sequence to the next in response to the clock cycle from the controller 6 .

該讀出電路26包含複數之輸入通道26-1、26-2、26-3;每個輸入通道26-1、26-2、26-3係連接至該感應器陣列10的一對應的行的像素12;為了提供這些連接,在每個像素12的該感應VCI 20的該傳導路徑係連接至該行的該輸入通道26-1。The readout circuit 26 includes a plurality of input channels 26-1, 26-2, 26-3; each input channel 26-1, 26-2, 26-3 is connected to a corresponding row of the sensor array 10 In order to provide these connections, the conductive path of the sensing VCI 20 in each pixel 12 is connected to the input channel 26-1 of the row.

該讀出電路26的每個輸入通道26-1、26-2、26-3可包含一類比前端(AFE)及一類比轉數位轉換器(ADC)以從連接至該輸入通道26-1的該行得到一數位信號;例如,其可整合在該閘極脈波期間的施加到該輸入通道的電流,以提供在該行的該活動的像素12的流過該感應VCI 20的電流的程度。該讀出電路26使用該ADC可轉換此信號成為數位資料;再者,該類比前端執行阻抗匹配、信號濾波以及其他信號調節,且亦可提供一虛擬參考(virtual reference)。Each input channel 26-1, 26-2, 26-3 of the readout circuit 26 may include an analog front end (AFE) and an analog-to-digital converter (ADC) to connect to the input channel 26-1 The row obtains a digital signal; for example, it can integrate the current applied to the input channel during the gate pulse to provide the degree of current flowing through the sensing VCI 20 of the active pixel 12 in the row . The readout circuit 26 can use the ADC to convert the signal into digital data; in addition, the analog front end performs impedance matching, signal filtering, and other signal conditioning, and can also provide a virtual reference.

在圖2所示的該感應器陣列10當中,在每個像素的該感應VCI 20的該傳導通道連接該行的該讀出電路的該輸入通道至該像素的列的該閘極驅動通道;在圖2當中,該列的該閘極驅動通道因此提供一參考輸入。該感應VCI 20的操作調節此參考輸入以提供該像素輸出;來自一像素的這個輸出信號指出了儲存於該電容式感應電極14上的電荷,以回應相對於儲存於該參考電容上的電荷的該參考輸入。In the sensor array 10 shown in FIG. 2, the conductive channel of the sensing VCI 20 in each pixel connects the input channel of the readout circuit of the row to the gate drive channel of the pixel column; In Figure 2, the gate drive channel in the column therefore provides a reference input. The operation of the sensing VCI 20 adjusts the reference input to provide the pixel output; the output signal from a pixel indicates the charge stored on the capacitive sensing electrode 14 in response to the charge stored on the reference capacitor The reference input.

圖1包含一網格以作為組成該陣列的該些像素12的該些列與該些行的一個非常概要的圖解;這通常會是一個直線的網格,且通常該些列與該些行會均勻地隔開;例如,該些像素可為正方形的;當然,應該理解圖1所示的該網格不是按比例繪示。通常,該感應器陣列具有至少200每英吋點數(dpi)(78每公分點數)的一像素間距;該像素間距可為至少300 dpi(118每公分點數),例如至少500 dpi(196每公分點數)。Fig. 1 contains a grid as a very general illustration of the columns and rows of the pixels 12 that make up the array; this will usually be a straight grid, and usually the columns and rows Will be evenly spaced; for example, the pixels may be square; of course, it should be understood that the grid shown in FIG. 1 is not drawn to scale. Generally, the sensor array has a pixel pitch of at least 200 dots per inch (dpi) (78 dots per centimeter); the pixel pitch can be at least 300 dpi (118 dots per centimeter), for example, at least 500 dpi ( 196 points per centimeter).

現在將描述圖2的該感應器陣列10的操作。The operation of the sensor array 10 of FIG. 2 will now be described.

在操作的每個週期,每個該閘極驅動電路24及該讀出電路26從該控制器6接收一時脈信號。In each cycle of operation, each of the gate drive circuit 24 and the readout circuit 26 receives a clock signal from the controller 6.

回應此時脈信號,該閘極驅動電路操作該些閘極驅動通道的其中之一以施加一控制電壓至該陣列的該些列的其中之一;在該列的每個像素當中,來自該閘極驅動通道的該控制電壓施加在串聯的該參考電容16及該電容式感應電極14;介於該參考電容16及該電容式感應電極14之間的該連接點18的該電壓提供一指示電壓,以指出該電容式感應電極14感應到一物體的一導電表面的接近。此指示電壓可施加在該感應VCI 20之該控制端以控制該感應VCI 20之該傳導路徑的該阻抗;因此,提供一電流從該閘極驅動流過該感應VCI 20之該傳導路徑到該像素的行的該輸入通道;此電流係由該閘極驅動電壓與該傳導通道的該阻抗所決定。In response to the clock signal, the gate drive circuit operates one of the gate drive channels to apply a control voltage to one of the columns of the array; in each pixel of the column, from the The control voltage of the gate drive channel is applied to the reference capacitor 16 and the capacitive sensing electrode 14 connected in series; the voltage at the connection point 18 between the reference capacitor 16 and the capacitive sensing electrode 14 provides an indication Voltage to indicate the proximity of the capacitive sensing electrode 14 to a conductive surface of an object. The indicating voltage can be applied to the control terminal of the sensing VCI 20 to control the impedance of the conduction path of the sensing VCI 20; therefore, a current is provided from the gate drive through the conduction path of the sensing VCI 20 to the The input channel of the row of pixels; the current is determined by the gate drive voltage and the impedance of the conduction channel.

回應這個相同的時脈信號,該讀出電路26在每個輸入通道感應該像素輸出信號;這可藉由整合在閘極脈波的時間週期內的該讀出電路26的每個輸入所接收到的電流來達成;在每個輸入通道的該信號,例如藉由整合來自該陣列的對應的行的電流所得到的電壓,可被數位化(例如,使用一ADC)。因此,對於每個閘極脈波來說,該讀出電路26得到一組數位信號,每個信號係對應於在該閘極脈波期間的該活動的列的一行;所以該組信號一起表現該活動的列為一個整體,且一起表現從指示儲存的該電荷的每個像素的輸出,及/或一起表現在該像素的該電容式感應電極14的該自電容。In response to the same clock signal, the readout circuit 26 senses the pixel output signal in each input channel; this can be received by each input of the readout circuit 26 integrated in the time period of the gate pulse The signal in each input channel, such as the voltage obtained by integrating the current from the corresponding row of the array, can be digitized (for example, using an ADC). Therefore, for each gate pulse, the readout circuit 26 obtains a set of digital signals, and each signal corresponds to a row of the active column during the gate pulse; therefore, the set of signals together represent The active column is a whole, and together represent the output from each pixel indicating the stored charge, and/or together represent the self-capacitance of the capacitive sensing electrode 14 of the pixel.

按照這相同的過程執行,該些閘極驅動通道的每一個被依次激活;此驅動了連接至該通道的每個像素的該感應VCI 20進入一導通狀態一選定的時間(通常是一個閘極脈波的該期間)。藉由依次激活該陣列的該些列,該讀出電路可列操作地掃描該感應器陣列。可使用其他像素設計、其他掃描順序以及其他型式的感應器陣列。According to the same process, each of the gate drive channels is activated in turn; this drives the sensing VCI 20 of each pixel connected to the channel into a conductive state for a selected time (usually a gate This period of the pulse wave). By sequentially activating the columns of the array, the readout circuit can scan the sensor array in a row operation. Other pixel designs, other scanning sequences, and other types of sensor arrays can be used.

圖3說明另一個感應器陣列,可使用在圖1所說明的裝置內。Figure 3 illustrates another sensor array that can be used in the device illustrated in Figure 1.

圖3顯示一感應器陣列10,包含複數之像素及一參考信號供應器28,該參考信號供應器28係用以供應一參考信號至該些像素;這可避免該閘極驅動電源供應的需求也會是要提供該讀出信號電流需求。Figure 3 shows a sensor array 10, including a plurality of pixels and a reference signal supplier 28, the reference signal supplier 28 is used to supply a reference signal to the pixels; this can avoid the need for the gate drive power supply It is also necessary to provide the read signal current demand.

圖3亦顯示該閘極驅動電路24、該讀出電路26及該控制器6。FIG. 3 also shows the gate drive circuit 24, the readout circuit 26, and the controller 6.

該感應器陣列10亦可因在每個像素包含一重置電路32、34而得到好處;這能允許該像素的該控制端22在該像素為不活動時(例如,當該陣列的另一列正在被施加到該陣列的另一個不同的列的閘極脈波激活時)被預先充電至一選定的重置電壓。The sensor array 10 can also benefit from the inclusion of a reset circuit 32, 34 in each pixel; this allows the control terminal 22 of the pixel to be inactive when the pixel is inactive (for example, when another column of the array The gate pulse that is being applied to a different column of the array is pre-charged to a selected reset voltage.

在這些實施例當中,該感應器亦可包含一重置電壓供應器42以供應一重置電壓至如下所述的該陣列的該些像素12的每一個;該重置電壓供應器42可包含電壓源電路,可配置為供應一可控電壓,且可連接至該控制器6以啟用該控制器6以調整與固定該重置電壓。In these embodiments, the sensor may also include a reset voltage supply 42 to supply a reset voltage to each of the pixels 12 of the array as described below; the reset voltage supply 42 may include The voltage source circuit can be configured to supply a controllable voltage, and can be connected to the controller 6 to enable the controller 6 to adjust and fix the reset voltage.

該重置電壓可被選擇以調整該像素的靈敏度;尤其,通常該感應VCI 20的該輸出電流具有依賴在該控制端22的該指示電壓與其接通電壓的一特性;因此,基於該感應VCI 20的該接通電壓,該重置電壓可被選擇;該特性亦可包含一線性區,該感應VCI 20操作於該線性區內較佳。The reset voltage can be selected to adjust the sensitivity of the pixel; in particular, usually the output current of the sensing VCI 20 has a characteristic that depends on the indicator voltage at the control terminal 22 and its turn-on voltage; therefore, based on the sensing VCI The turn-on voltage of 20, the reset voltage can be selected; the characteristic can also include a linear region, and the inductive VCI 20 operates better in the linear region.

在圖3所說明的該些像素類似於圖1與圖2所說明的該些像素,每個像素包含一電容式感應電極14及與一電容式感應電極14連接的一參考電容16;介於這些兩個電容之間的連接提供一指示電壓,該指示電壓可為例如連接至一感應VCI 20之該控制端22。此外,在圖3所說明的該感應器陣列之該些像素亦進一步包含兩個VCI 34、38,以及往該重置電壓供應器42的一連接,以及往該參考信號供應器28的一連接。The pixels illustrated in FIG. 3 are similar to the pixels illustrated in FIGS. 1 and 2. Each pixel includes a capacitive sensing electrode 14 and a reference capacitor 16 connected to a capacitive sensing electrode 14; The connection between these two capacitors provides an indicator voltage, which can be, for example, the control terminal 22 connected to a sensing VCI 20. In addition, the pixels of the sensor array illustrated in FIG. 3 further include two VCIs 34, 38, and a connection to the reset voltage supply 42 and a connection to the reference signal supply 28 .

如上所述,該感應VCI 20係大體上地如上述關於圖1般設置,該感應VCI 20之該控制端22係連接至介於該參考電容16及該電容式感應電極14之間的該連接點;然而,在圖3當中,該感應VCI 20之該傳導路徑係連接不同於圖1;尤其是,該選擇VCI 38之該傳導通道連接該感應VCI 20之該傳導通道至該參考信號供應器28,該參考信號供應器28提供一電壓Vref ;因此,該感應VCI 20之該傳導通道係介於該選擇VCI 38之該傳導通道與該行的該讀出電路的該輸入之間串聯連接。因此,該選擇VCI 38擔任了一開關的角色,當導通時,在Vref /該參考信號供應器28與該讀出電路的該輸入之間連接該感應VCI 20,而當不導通時,從該參考信號供應器28斷開該感應VCI。為了清晰起見,介於該選擇VCI的該傳導通道及Vref ,與該參考信號供應器28之間的該連接僅顯示在該些像素的該陣列的最上面的列;在圖中使用該標記Vref 來指出該陣列的較為下面的該些列與該參考信號供應器28的連接。As mentioned above, the sensing VCI 20 is arranged substantially as described above with respect to FIG. 1, and the control terminal 22 of the sensing VCI 20 is connected to the connection between the reference capacitor 16 and the capacitive sensing electrode 14. Point; However, in Figure 3, the conduction path of the induction VCI 20 is connected differently from Figure 1; in particular, the conduction channel of the selected VCI 38 connects the conduction channel of the induction VCI 20 to the reference signal supplier 28. The reference signal supplier 28 provides a voltage Vref ; therefore, the conduction channel of the inductive VCI 20 is connected in series between the conduction channel of the selection VCI 38 and the input of the readout circuit of the row . Therefore, the selected VCI 38 plays a role of a switch. When it is turned on, the sensing VCI 20 is connected between the Vref /reference signal supplier 28 and the input of the readout circuit, and when it is not turned on, The reference signal supplier 28 disconnects the inductive VCI. For the sake of clarity, the connection between the conduction channel of the selected VCI and V ref and the reference signal supplier 28 is only shown in the uppermost column of the array of the pixels; this is used in the figure Mark V ref to indicate the connection between the lower columns of the array and the reference signal supplier 28.

因此,該選擇VCI 38係可操作地禁止來自於任何不活動的像素的信號的供應傳送至該讀出電路26的輸入;這可以幫助確認只會接收來自於活動的該些像素(例如,那些正在被施加閘極驅動脈波的該列的該些像素)的信號。Therefore, the selection VCI 38 is operable to prohibit the supply of signals from any inactive pixels to the input of the readout circuit 26; this can help confirm that only those pixels that are active (for example, those The signals of the pixels in the column to which the gate drive pulse is being applied).

在一具體實施例當中,該些像素的每一行係實際上連接至一接地或參考電壓;正因為如此,在該些行的每一個上沒有電壓差異,因此使寄生電容減到最小。此外,可使用一電流驅動的該參考信號供應器,而非一電壓驅動的,以能夠更削減在該讀出電路26的該些輸入上的活動的該些像素所施加的在該信號上具有的任何影響的寄生電容。In a specific embodiment, each row of the pixels is actually connected to a ground or reference voltage; because of this, there is no voltage difference on each of the rows, so parasitic capacitance is minimized. In addition, a current-driven reference signal supplier can be used instead of a voltage-driven one, so as to be able to further reduce the activity on the inputs of the readout circuit 26. Any influence of parasitic capacitance.

該像素列的該閘極驅動通道係連接至該參考電容16的該第一極板以及連接至一選擇VCI 38的該控制端;如在圖1與圖2所說明的該像素當中,該參考電容16與電容式感應電極14的連接點意味著該閘極驅動電壓係介於該參考電容16與該電容式感應電極14之間被分壓,以提供該指示電壓以控制該感應VCI 20。然而,連至該選擇VCI 38的該控制端40的該連接點意味著當該像素不是活動的時候,該感應VCI 20之該傳導路徑從該參考信號供應器28被切斷。The gate drive channel of the pixel column is connected to the first plate of the reference capacitor 16 and to the control terminal of a selection VCI 38; as in the pixel illustrated in FIGS. 1 and 2, the reference The connection point of the capacitor 16 and the capacitive sensing electrode 14 means that the gate driving voltage is divided between the reference capacitor 16 and the capacitive sensing electrode 14 to provide the indicator voltage to control the sensing VCI 20. However, the connection point to the control terminal 40 of the selection VCI 38 means that the conductive path of the sensing VCI 20 is cut off from the reference signal supplier 28 when the pixel is not active.

該感應VCI 20的一控制端22係連接至該參考電容16的該第二極板;該感應VCI 20之該傳導路徑連接該參考信號供應器28至該像素的行的該讀出電路26的該輸入。A control terminal 22 of the sensing VCI 20 is connected to the second plate of the reference capacitor 16; the conductive path of the sensing VCI 20 connects the reference signal supplier 28 to the readout circuit 26 of the pixel row The input.

該重置VCI 34的一傳導路徑係連接介於該參考電容16的該第二極板與該重置電壓供應器的一電壓輸出之間,以接收該重置電壓;該重置VCI 34的該控制端32係連接至一重置信號供應器,例如該感應器陣列的另一列的該閘極驅動通道;在該陣列的另一列的活動期間(例如,在該像素的列之前的該閘極脈波上被激活的該陣列的一列),這可致使該重置VCI 34放電該參考電容16,或使該感應VCI 20的該控制端22預先充電至該重置電壓。A conductive path of the reset VCI 34 is connected between the second plate of the reference capacitor 16 and a voltage output of the reset voltage supply to receive the reset voltage; the reset VCI 34 The control terminal 32 is connected to a reset signal supplier, such as the gate drive channel of another column of the sensor array; during the activity period of another column of the array (for example, the gate before the column of the pixel) This can cause the reset VCI 34 to discharge the reference capacitor 16 or cause the control terminal 22 of the sensing VCI 20 to be pre-charged to the reset voltage.

現在將描述圖3的該感應器陣列的操作。The operation of the sensor array of FIG. 3 will now be described.

每個該閘極驅動電路24及該讀出電路26從該控制器6接收一時脈信號;回應這個時脈信號,該閘極驅動電路24激活該閘極驅動電路24的一第一閘極驅動通道以提供一閘極脈波至該陣列10的一列;因此,一控制電壓施加在該第一列(在此閘極脈波期間的該活動列)的該些像素的該選擇VCI 38的該控制端。Each of the gate drive circuit 24 and the readout circuit 26 receives a clock signal from the controller 6; in response to this clock signal, the gate drive circuit 24 activates a first gate drive of the gate drive circuit 24 Channel to provide a gate pulse to a column of the array 10; therefore, a control voltage is applied to the selected VCI 38 of the pixels in the first column (the active column during the gate pulse) Control terminal.

該控制電壓亦施加在一第二列(在此閘極脈波期間不活動的)的該些像素的該重置VCI 34的該控制端。The control voltage is also applied to the control terminal of the reset VCI 34 of the pixels in a second column (inactive during the gate pulse).

在該第一列(該活動列)當中,該選擇VCI 38的該傳導通道係藉由該控制電壓(例如,由該閘極脈波所提供)切換至一傳導狀態;因此,該選擇VCI 38的該傳導通道連接該感應VCI 20的該傳導通道至該參考信號供應器28。In the first row (the active row), the conduction channel of the selected VCI 38 is switched to a conduction state by the control voltage (for example, provided by the gate pulse); therefore, the selected VCI 38 The conductive channel of the sensor VCI 20 is connected to the reference signal supplier 28.

該控制電壓亦施加在該參考電容16的該第一極板;關於如上所述的圖1及圖2,介於該感應電極14及該參考電容16之間的成比例的分壓在介於該參考電容16及該電容式感應電極14之間的該連接點提供一指示電壓;該指示電壓施加在該感應VCI 20的該控制端22以控制該感應VCI 20的該傳導通道的該阻抗;因此,該感應VCI 20連接該參考信號供應器28至該行的該讀出電路26的該輸入通道,並顯露介於兩者之間的一阻抗,以指出該電容式感應電極14的該電容量。請注意,該參考信號供應器可由一恆電壓電流供應器所提供。The control voltage is also applied to the first plate of the reference capacitor 16; with respect to FIGS. 1 and 2 as described above, the proportional voltage division between the sensing electrode 14 and the reference capacitor 16 is between The connection point between the reference capacitor 16 and the capacitive sensing electrode 14 provides an indicator voltage; the indicator voltage is applied to the control terminal 22 of the sensing VCI 20 to control the impedance of the conduction channel of the sensing VCI 20; Therefore, the sensing VCI 20 connects the reference signal supplier 28 to the input channel of the readout circuit 26 of the row, and reveals an impedance between the two to indicate the electrical power of the capacitive sensing electrode 14 capacity. Please note that the reference signal supply can be provided by a constant voltage current supply.

因此,一電流透過該感應VCI 20的該傳導路徑從該參考信號供應器28提供至該像素的行的該讀出電路26的該輸入通道;此電流係由該參考信號供應器的該電壓及該感應VCI的該傳導通道的該阻抗所決定。Therefore, a current is supplied from the reference signal supplier 28 to the input channel of the readout circuit 26 of the pixel row through the conduction path of the sensing VCI 20; this current is determined by the voltage and the reference signal supplier's The impedance of the conductive channel of the inductive VCI is determined.

回應來自該控制器6的相同的時脈信號,該讀出電路26在每個輸入通道感應該像素輸出信號(例如,藉由整合提供至每個輸入通道的該電流),並且數位化此信號;該讀出電路26的該整合時間可等同於該閘極脈波的該期間。In response to the same clock signal from the controller 6, the readout circuit 26 senses the pixel output signal in each input channel (for example, by integrating the current provided to each input channel), and digitizes the signal ; The integration time of the readout circuit 26 can be equivalent to the period of the gate pulse.

因此,在每個時脈週期當中,該讀出電路26得到一組數位信號,每個信號對應於在該閘極脈波期間的從該活動的列的每一行所感應的該些信號;來自該列的每個像素12的輸出(在該閘極脈波期間的每個通道)係指出儲存在該像素的該電容式感應電極上的該電荷。Therefore, during each clock cycle, the readout circuit 26 obtains a set of digital signals, each signal corresponding to the signals induced from each row of the active column during the gate pulse; The output of each pixel 12 in the column (each channel during the gate pulse) indicates the charge stored on the capacitive sensing electrode of the pixel.

在該第二(不活動的)列,該控制電壓施加到該重置VCI 34之該控制端32;這造成在該不活動的列的該些像素的該重置VCI 34連接他們的該些參考電容16的該第二極板至由該重置電壓供應器所提供的一重置電壓;這會使累積在該不活動的列的該些像素上的電荷放電(例如,至少部份地移動),或者是在他們是在一隨後的閘極脈波內的下一個被激活的之前,對他們充電至該重置電壓。此重置電壓可被選擇以調整該些像素的該靈敏度。In the second (inactive) column, the control voltage is applied to the control terminal 32 of the reset VCI 34; this causes the reset VCI 34 of the pixels in the inactive column to connect their Refer to the second plate of the capacitor 16 to a reset voltage provided by the reset voltage supply; this will discharge the charge accumulated on the pixels of the inactive column (for example, at least partially move ), or charge them to the reset voltage before they are activated next in a subsequent gate pulse. The reset voltage can be selected to adjust the sensitivity of the pixels.

在該像素陣列的該些邊界,不能得到一個N-1閘極線,可以使用一個虛擬(dummy)信號以提供該控制信號至該重置VCI;該閘極驅動電路24可提供該虛擬信號;此可由僅連接至在該陣列的該邊界的一列的該些重置VCI的但不連接至任何感應或選擇VCI的一閘極驅動通道所提供。At the boundaries of the pixel array, an N-1 gate line cannot be obtained. A dummy signal can be used to provide the control signal to the reset VCI; the gate driving circuit 24 can provide the dummy signal; This can be provided by a gate drive channel that is only connected to the reset VCI in a column at the boundary of the array, but is not connected to any sense or select VCI.

如圖3所說明的,該些像素的該重置VCI 34可連接至該閘極驅動電路,使得每一列以這樣的方式放電:藉由激活該立即在前的列(可為該陣列的一個鄰近的列)之該閘極脈波。As illustrated in FIG. 3, the reset VCI 34 of the pixels can be connected to the gate drive circuit, so that each column is discharged in such a way that by activating the immediately preceding column (which can be one of the array) Adjacent column) of the gate pulse.

圖4顯示操作圖3的該感應器陣列的在列N的一像素之一信號時序圖。FIG. 4 shows a signal timing diagram of a pixel in column N operating the sensor array of FIG. 3.

圖4的該信號時序圖包含複數信號數值參照一共同時間軸的四個分開的子圖(100、102、104、106)。The signal timing diagram of FIG. 4 includes four separate sub-graphs (100, 102, 104, 106) with complex signal values with reference to a common time axis.

該第一子圖100表示回應於閘極脈波N-1 100b的施加在閘極線N-1的該控制電壓100a;該第二子圖102表示回應於閘極脈波N 102b的施加在閘極線N的該控制電壓102a;該第三子圖104表示一像素的該控制端22的指示電壓104a、104b,其中該像素從電容式感應電極14感應在兩個不同距離的一導電物體的;最底下的該第四子圖106表示該些讀出信號106a、106b,其中該些讀出信號106a、106b係來自於施加在該讀出電路26的該輸入的第三子圖104的該像素。The first sub-diagram 100 shows the control voltage 100a applied to the gate line N-1 in response to the gate pulse N-1 100b; the second sub-diagram 102 shows the control voltage 100a applied to the gate line N-1 in response to the gate pulse N 102b. The control voltage 102a of the gate line N; the third sub-figure 104 shows the indication voltages 104a, 104b of the control terminal 22 of a pixel, in which the pixel senses a conductive object at two different distances from the capacitive sensing electrode 14 The fourth sub-picture 106 at the bottom represents the readout signals 106a, 106b, where the readout signals 106a, 106b are from the third sub-picture 104 applied to the input of the readout circuit 26 The pixel.

圖4的該時間軸具有三個等級T0 、T1 及T2 ,表示在時間的不同點;介於T0 及T1 之間的區間表示閘極脈波N-1的該持續時間,而介於T1 及T2 之間的區間表示閘極脈波N的該持續時間。The time axis of Fig. 4 has three levels T 0 , T 1 and T 2 , indicating different points in time; the interval between T 0 and T 1 indicates the duration of the gate pulse N-1, The interval between T 1 and T 2 represents the duration of the gate pulse N.

現在將論述當該感應器陣列在操作時,圖4的該些子圖的運行狀況。The operation of the subgraphs of FIG. 4 when the sensor array is in operation will now be discussed.

在T0 ,回應於該閘極脈波N-1 100b所產生的一控制電壓100係從閘極線N-1施加至在列N的該些像素的該些重置VCI 34的該些控制端;這接通了該些重置VCI 34並因此透過介於該些感應VCI 20的該些控制端22與該重置電壓供應器的該電壓輸出之間的該些重置VCI 34打開一傳導路徑;因此,該重置電壓施加至該像素的該感應VCI 20的該控制端22,例如可以在該感應VCI 20的該控制端22的該電壓的介於T0 及T1 之間的該些子圖104a、104b當中看出。At T 0 , a control voltage 100 generated in response to the gate pulse N-1 100b is applied from the gate line N-1 to the control of the reset VCI 34 of the pixels in the row N Terminal; this turns on the reset VCI 34 and therefore through the reset VCI 34 between the control terminals 22 of the sensing VCI 20 and the voltage output of the reset voltage supply to open a Conduction path; therefore, the reset voltage is applied to the control terminal 22 of the sensing VCI 20 of the pixel, for example, the voltage of the control terminal 22 of the sensing VCI 20 may be between T 0 and T 1 These sub-pictures 104a and 104b can be seen.

如上描述所述,該重置電壓可被選擇以調整在該矩陣的該些像素的該靈敏度;尤其是,該些感應VCI 20的該輸出電流通常具有一特性,其中該特性係依賴於在該控制端22的該指示電壓與它的接通電壓;因此,該重置電壓可基於該感應VCI 20的該接通電壓而被選擇;該特性亦可包含一線性區且感應VCI 20操作於該線性區較佳。As described above, the reset voltage can be selected to adjust the sensitivity of the pixels in the matrix; in particular, the output current of the induced VCI 20 usually has a characteristic, wherein the characteristic depends on the The indicating voltage of the control terminal 22 and its turn-on voltage; therefore, the reset voltage can be selected based on the turn-on voltage of the sensing VCI 20; the characteristic can also include a linear region and the sensing VCI 20 operates at the The linear region is better.

在T1 ,在該閘極脈波N-1 100b已經完成之後,來自閘極線N的一閘極脈波N 102b造成該閘極驅動電路24施加一控制電壓102a至在列N的該些像素的該些參考電容16的該些第一極板及該些選擇VCI 38的該些控制端40。At T 1 , after the gate pulse N-1 100b has been completed, a gate pulse N 102b from the gate line N causes the gate drive circuit 24 to apply a control voltage 102a to the rows N The first plates of the reference capacitors 16 and the control terminals 40 of the selection VCI 38 of the pixel.

該控制電壓102施加至該些選擇VCI 38的該些控制端40的該應用的一結果,是介於該參考信號供應器28與列N的該些像素的該些感應VCI 20之間的一傳導路徑被打開。A result of the application of the control voltage 102 to the control terminals 40 of the selection VCI 38 is a value between the reference signal supplier 28 and the sensing VCI 20 of the pixels of the column N The conduction path is opened.

當一導電表面足夠接近在列N的一像素的該電容式感應電極14時,如在圖4的情況,會產生一指示電壓104a,其中該指示電壓104a係依賴介於該感應電極14與該參考電容16之間的該成比例的分壓;該電容式感應電極與該參考電容所產生的該指示電壓係施加在該感應VCI 20的該控制端22,從而介於該參考信號供應器28及該讀出電路26之間的一傳導路徑被打開。When a conductive surface is sufficiently close to the capacitive sensing electrode 14 of a pixel in column N, as in the case of FIG. 4, an indicator voltage 104a is generated, wherein the indicator voltage 104a depends on the sensing electrode 14 and the capacitive sensing electrode 14 The proportional voltage division between the reference capacitor 16; the indicator voltage generated by the capacitive sensing electrode and the reference capacitor is applied to the control terminal 22 of the sensing VCI 20, thereby being connected to the reference signal supplier 28 A conductive path between and the readout circuit 26 is opened.

因此,例如那些顯示在106的複數信號係施加於該讀出電路26的該對應的輸入,該信號的大小將依賴於該導電表面的接近程度。Therefore, for example, those complex signals shown at 106 are applied to the corresponding input of the readout circuit 26, and the magnitude of the signal will depend on the proximity of the conductive surface.

圖4所示的例子重疊由一導電物體距離一像素的該電容式感應電極14的設置在兩個不同的距離所產生的兩種信號(106a與106b)。The example shown in FIG. 4 overlaps two kinds of signals (106a and 106b) generated by the capacitive sensing electrode 14 arranged at two different distances from a conductive object to one pixel.

該導電物體的該兩個不同位置導致該感應電極的兩個不同的電容量(例如,因為該手指的該些皮膚提供一電容的一第二”極板”,其中該第一”極板”係由該感應電極14所提供);該些指示電壓(104a與104b)係施加至該像素的該感應VCI 20的該控制端22;因此,對於該導電表面的該兩個位置來說,該感應VCI 20的該傳導路徑的該阻抗會不同。The two different positions of the conductive object result in two different capacitances of the sensing electrode (for example, because the skin of the finger provides a second "plate" of a capacitor, where the first "plate" Are provided by the sensing electrode 14); the indicating voltages (104a and 104b) are applied to the control terminal 22 of the sensing VCI 20 of the pixel; therefore, for the two positions of the conductive surface, the The impedance of the conductive path of the sensing VCI 20 will be different.

施加至該讀出電路26的該輸入的該信號係依賴於該感應VCI 20的該阻抗,因此對於距離該電容式感應電極14兩個不同距離的該導電表面來說是不同的。The signal applied to the input of the readout circuit 26 depends on the impedance of the sensing VCI 20 and therefore is different for the conductive surface at two different distances from the capacitive sensing electrode 14.

此例證於該些控制端22電壓信號(104a與104b)與讀出信號外形(106a與106b),如圖4所示。This is exemplified by the voltage signals (104a and 104b) and read signal shapes (106a and 106b) of the control terminals 22, as shown in FIG.

在T2 ,該閘極線脈波N 102b完成,且該閘極驅動電路停止施加一控制電壓102a至在列N的該些像素;該控制電壓不再施加至該些選擇VCI 38的該些控制端,因此關掉列N的該些選擇VCI。At T 2 , the gate line pulse N 102b is completed, and the gate driving circuit stops applying a control voltage 102a to the pixels in column N; the control voltage is no longer applied to the pixels of the selected VCI 38 Therefore, the control terminal turns off the selected VCIs of column N.

因此,關掉通過在列N的該些像素的該些選擇VCI的該些傳導路徑,且該像素不再施加一信號(106a與106b)至該讀出電路的該輸入。Therefore, the conductive paths through the selective VCI of the pixels in column N are turned off, and the pixel no longer applies a signal (106a and 106b) to the input of the readout circuit.

可以看出,在線的該閘極脈波N 102b完成之後,在該感應電極上的一些殘留電荷會殘存;應當理解在本揭露的上下文當中,該選擇VCI 38可擔任預防如此的殘留電荷,其中如此的殘留電荷係操作該感應VCI 20且因此引起來自於不活動的該些列的假的信號。It can be seen that after the online gate pulse N 102b is completed, some residual charges on the sensing electrode will remain; it should be understood that in the context of this disclosure, the selection of VCI 38 can be used to prevent such residual charges. Such residual charge operates the sensing VCI 20 and therefore causes false signals from the inactive columns.

不同的像素設計可以被使用在例如描述於關於圖3的配置。Different pixel designs can be used in, for example, the configuration described in relation to FIG. 3.

圖5說明圖3的在該陣列所說明的該感應像素12的一電路圖。然而,為了清晰起見,該像素12被隔離顯示。FIG. 5 illustrates a circuit diagram of the sensing pixel 12 illustrated in the array of FIG. 3. However, for clarity, the pixel 12 is displayed in isolation.

可以看出,該像素12包含一參考電容16、一電容式感應電極14、一感應VCI 20、一選擇VCI 38及一重置VCI 34。It can be seen that the pixel 12 includes a reference capacitor 16, a capacitive sensing electrode 14, a sensing VCI 20, a selection VCI 38, and a reset VCI 34.

圖5的該像素12類似於圖1所示的該觸碰感應像素12及上述描述,其中介於該參考電容16及該電容式感應電極14之間的一連接點提供一指示電壓,可連接至該感應VCI 20的該控制端。The pixel 12 of FIG. 5 is similar to the touch sensing pixel 12 shown in FIG. 1 and the above description, wherein a connection point between the reference capacitor 16 and the capacitive sensing electrode 14 provides an indication voltage, which can be connected To the control end of the sensing VCI 20.

然而,圖5的該像素12與圖1的該觸碰感應像素12的不同處在於它包含一選擇VCI 38及一重置VCI 34。However, the difference between the pixel 12 in FIG. 5 and the touch sensing pixel 12 in FIG. 1 is that it includes a selection VCI 38 and a reset VCI 34.

該選擇VCI 38的該傳導路徑係連接介於該感應VCI 20之該傳導通道與一參考信號供應器之間;因此,該感應VCI 20係介於該選擇VCI 38及一讀出電路26之一輸入之間串聯連接。該像素之一閘極線輸入係連接至該選擇VCI 38之該控制端40。The conduction path of the selection VCI 38 is connected between the conduction channel of the sensing VCI 20 and a reference signal supplier; therefore, the sensing VCI 20 is one of the selection VCI 38 and a readout circuit 26 The inputs are connected in series. A gate line input of the pixel is connected to the control terminal 40 of the selection VCI 38.

該重置VCI 34的該傳導路徑係連接介於該參考電容16的該第二極板與一重置電壓供應器之間。該重置VCI 34的該控制端係連接至該像素的一重置信號供應器輸入,當該像素組合至一陣列時,這可為例如,在該陣列的該些像素的另一列的與一閘極線的一連接。The conductive path of the reset VCI 34 is connected between the second plate of the reference capacitor 16 and a reset voltage supply. The control terminal of the reset VCI 34 is connected to the input of a reset signal supplier of the pixel. When the pixel is combined into an array, this can be, for example, the AND of another column of the pixels in the array. A connection of the gate line.

圖6仍然說明適合使用在例如圖3所說明的一陣列的一像素的一個進一步的例子;此像素與圖4所描述的像素相同,不同處在於它包含一閘極線VCI 30及一第二重置VCI 36。FIG. 6 still illustrates a further example of a pixel suitable for use in an array such as that illustrated in FIG. 3; this pixel is the same as the pixel described in FIG. 4, except that it includes a gate line VCI 30 and a second Reset VCI 36.

該閘極線VCI 30的該控制端44係連接至該陣列的它的列的該閘極驅動通道;該閘極線VCI 30的該傳導路徑係連接介於該參考信號供應器28及該參考電容16的一第一極板之間;因此,由該閘極驅動電路24對該閘極線VCI 30的操控可連接該參考電容16與電容式感應電極14的該串聯連接至該參考信號供應器28,且當該閘極線VCI 30關閉不導通時,該像素從該參考信號供應器28斷線。The control terminal 44 of the gate line VCI 30 is connected to the gate drive channel of the other column of the array; the conduction path of the gate line VCI 30 is connected between the reference signal supplier 28 and the reference Between a first plate of the capacitor 16; therefore, the control of the gate line VCI 30 by the gate drive circuit 24 can connect the series connection of the reference capacitor 16 and the capacitive sensing electrode 14 to the reference signal supply When the gate line VCI 30 is closed and non-conducting, the pixel is disconnected from the reference signal supplier 28.

此外,該閘極線信號不需要供應該電流以為了讀出而充電該陣列。In addition, the gate line signal does not need to supply the current to charge the array for readout.

正如圖5的該像素,圖6所示的該像素的該重置電路包含該重置VCI 34,其中該重置VCI 34係連接介於該參考電容16的該第二極板與一重置電壓供應器42之間,且亦包含一重置VCI 36,其中該重置VCI 36係連接介於該參考電容16的該第一極板與該重置電壓供應器之間;該重置VCI 34的該控制端32與該重置VCI 36的該控制端46係連接至一重置信號供應器,例如上述之該感應器陣列的另一列的該閘極驅動通道。Just like the pixel of FIG. 5, the reset circuit of the pixel shown in FIG. 6 includes the reset VCI 34, wherein the reset VCI 34 is connected between the second plate of the reference capacitor 16 and a reset Between the voltage supply 42 and also includes a reset VCI 36, where the reset VCI 36 is connected between the first plate of the reference capacitor 16 and the reset voltage supply; the reset VCI The control terminal 32 of the 34 and the control terminal 46 of the reset VCI 36 are connected to a reset signal supplier, such as the gate drive channel of another column of the sensor array mentioned above.

應理解在本揭露之上下文當中,可以使用其他重置電路;例如,該重置VCI 34的該傳導路徑可連接該參考電容的該第一極板至它的第二極板(例如,短路該參考電容16)。It should be understood that in the context of the present disclosure, other reset circuits may be used; for example, the conductive path of the reset VCI 34 may connect the first plate of the reference capacitor to its second plate (for example, short-circuit the Refer to capacitor 16).

在圖3的該陣列的在圖6所示的該像素12的操作類似於顯示在圖5及上述之該像素的操作;然而,除了操作該選擇VCI 38的該控制端之外,該控制電壓亦操作該閘極線VCI 30以連接該參考電容16之該第一極板至該參考信號供應器28;此參考信號被用來在介於該參考電容16與該電容式感應電極14之間的該連接點提供一指示電壓,如上關於圖1與圖2的描述;當一控制電壓施加於選擇VCI 38以連接該參考信號供應器28至該行的該讀出電路的該輸入通道時,該指示電壓係施加於該感應VCI 20之該控制端以控制該感應VCI 20之該傳導通道的該阻抗。The operation of the pixel 12 shown in FIG. 6 in the array of FIG. 3 is similar to the operation of the pixel 12 shown in FIG. 5 and above; however, except for operating the control terminal of the selection VCI 38, the control voltage The gate line VCI 30 is also operated to connect the first plate of the reference capacitor 16 to the reference signal supplier 28; the reference signal is used between the reference capacitor 16 and the capacitive sensing electrode 14 The connection point provides an indication voltage, as described above with respect to Figs. 1 and 2; when a control voltage is applied to select VCI 38 to connect the reference signal supplier 28 to the input channel of the readout circuit of the row, The indicating voltage is applied to the control terminal of the sensing VCI 20 to control the impedance of the conduction channel of the sensing VCI 20.

此外,回應從一重置信號供應器(例如上述之該感應器陣列的另一列的該閘極驅動通道)傳送至該重置VCI 36與重置VCI 34的該些控制端的一重置信號,開啟介於該參考電容16與該重置電壓供應器之間的一傳導路徑;這造成該重置電壓施加至該參考電容16的兩個電極,並因此跨過該參考電容16的該電壓為零。In addition, in response to a reset signal sent from a reset signal provider (such as the gate drive channel of another column of the sensor array mentioned above) to the reset VCI 36 and the reset VCI 34 control terminals, A conductive path between the reference capacitor 16 and the reset voltage supply is opened; this causes the reset voltage to be applied to the two electrodes of the reference capacitor 16, and therefore the voltage across the reference capacitor 16 is zero.

基於該介電質屏蔽的該厚度及/或該屏蔽的該介電常數,該重置電壓可被選擇;例如,該重置電壓可被選擇以確定電容量改變的該範圍,其中電容量改變係關聯於感應到一物體(例如人類皮膚的輪廓)的複數特性以從該電容式分電位器14、16提供在複數指示電壓的複數改變,以在一個可以測定的程度內的不同的方式足以操作該感應VCI;例如,基於該感應VCI的一臨界電壓與基於該介電質屏蔽的該厚度及/或該屏蔽的該介電常數,該重置電壓可被選擇,使得該皮膚的該些輪廓的複數脊部與複數凹部都能使該感應VCI在其電流電壓特性的一線性區域內操作。Based on the thickness of the dielectric shield and/or the dielectric constant of the shield, the reset voltage may be selected; for example, the reset voltage may be selected to determine the range of capacitance change, wherein the capacitance changes It is related to sensing the complex characteristics of an object (such as the contour of human skin) to provide a complex change in the complex indication voltage from the capacitive potentiometer 14, 16 to be sufficient in different ways within a measurable degree Operate the inductive VCI; for example, based on a threshold voltage of the inductive VCI and based on the thickness of the dielectric shield and/or the dielectric constant of the shield, the reset voltage can be selected so that the skin The multiple ridges and the multiple recesses of the profile can enable the induced VCI to operate in a linear region of its current-voltage characteristics.

該感應VCI 20的該傳導路徑的該輸出電流較佳者為取決於施加在該控制端22的該指示電壓,且此外對於在控制端22電壓的一個被給定的改變來說,該感應VCI 20的該輸出電流的改變較佳者為取決於施加在該控制端22的該電壓的該值。The output current of the conduction path of the inductive VCI 20 preferably depends on the indicating voltage applied to the control terminal 22, and in addition, for a given change in the voltage at the control terminal 22, the inductive VCI The change of the output current of 20 preferably depends on the value of the voltage applied to the control terminal 22.

該重置電壓可經有益的設定,使得該感應VCI的該控制端22電壓係位於該VCI的輸出電流與控制端22電壓線性地改變的一電壓範圍內;如果該選擇VCI存在的話,這是特別地正確。亦可能基於該感應VCI的一臨界電壓選擇該重置電壓,例如使得在一靜止狀態,該感應VCI在該臨界。The reset voltage can be beneficially set so that the voltage of the control terminal 22 of the sensing VCI is within a voltage range where the output current of the VCI and the voltage of the control terminal 22 change linearly; if the selected VCI exists, this is Especially correct. It is also possible to select the reset voltage based on a threshold voltage of the induced VCI, for example, such that in a static state, the induced VCI is at the threshold.

在此描述的該些具體實施例通常包含一個或更多個電壓控制阻抗(VCI);每個這樣的VCI具有一個控制端,以及一傳導路徑,使其阻抗可被應用至它的控制端的一電壓所控制;電壓控制阻抗的例子包含複數之電晶體,例如複數之薄膜電晶體(TFTs);亦應理解,當以達成電壓控制阻抗的手段實現該感應器時,該些薄膜電晶體係擔當複數之轉導(transconduction)閘極,其中該TFT的該輸出電流(I汲極-源極 )可取決於跨過該TFT的該閘極與源極的該電壓(V閘極-源極 )。The specific embodiments described here generally include one or more voltage controlled impedances (VCI); each such VCI has a control terminal and a conductive path so that its impedance can be applied to one of its control terminals. Voltage controlled impedance; examples of voltage controlled impedance include multiple transistors, such as multiple thin film transistors (TFTs); it should also be understood that when the inductor is implemented by means of voltage controlled impedance, these thin film transistor systems are responsible A complex number of transconduction gates, where the output current (I drain-source ) of the TFT can depend on the voltage across the gate and source of the TFT (V gate-source ) .

該介電質屏蔽可包含一薄板或絕緣材料層,例如玻璃或塑膠;在此描述的該介電質屏蔽的該絕緣材料可基於一個或更多個以下內容而選擇:表面粗糙度、透明度、化學惰性(chemical inertia)、機械強度與韌性、介電常數、熱學特性(thermal behaviour)與製造容易度;適合的玻璃基質包含但不限制:鹼石灰(soda lime)、硼矽酸鹽(borasilicate)與二氧化矽(SiO2);適合的聚合物基板(polymer substrate)包含但不限制聚亞醯胺(poly imide、PI)、聚對苯二甲酸乙二酯(polyethylene terephthalate、PET)、聚萘二甲酸乙二醇酯(polyethylene naphthalate、PEN)。The dielectric shield may include a thin plate or a layer of insulating material, such as glass or plastic; the insulating material of the dielectric shield described herein may be selected based on one or more of the following: surface roughness, transparency, Chemical inertia (chemical inertia), mechanical strength and toughness, dielectric constant, thermal behaviour (thermal behaviour) and ease of manufacturing; suitable glass substrates include but are not limited to: soda lime, borasilicate And silicon dioxide (SiO2); suitable polymer substrates include but are not limited to polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate Polyethylene naphthalate (PEN).

應理解在本揭露之上下文當中,該感應裝置可被設計以匹配特定的複數時序(timings)。It should be understood that in the context of the present disclosure, the sensing device can be designed to match specific complex timings.

由該讀出電路所執行的該像素陣列的該讀出可被執行在一個訊框基(frame basis)上,其中該些像素的每一列被循序地使用一專用的列時間讀出,使得在一列時間之內,該列的所有相應的像素被讀出。The readout of the pixel array performed by the readout circuit can be performed on a frame basis, where each column of the pixels is sequentially read out using a dedicated column time, so that Within one column time, all corresponding pixels in the column are read out.

這樣的一讀出係類似於TFT顯示技術;然而,目前的實例係有關於該感應器陣列的像素讀取(pixel-reading),而不是一TFT顯示的該像素寫入(pixel-writing)。Such a readout is similar to TFT display technology; however, the current example is related to pixel-reading of the sensor array, rather than pixel-writing of a TFT display.

所有列與相關的時序的收集可定義該感應裝置的該框時間(frame time);例如,25微秒(µsec)的一個列時間,具有總共100列,則導致2.5毫秒(msec)的一個框時間,即25µsec x 100msecs。The collection of all columns and related timing can define the frame time of the sensing device; for example, a column time of 25 microseconds (µsec), with a total of 100 columns, results in a frame time of 2.5 milliseconds (msec) The time is 25µsec x 100msecs.

其他的時序與讀出順序也可為合適的;例如,在多工器電路的例子當中,在一單一的閘極線時間之內必須執行許多的轉換。Other timing and readout sequences may also be suitable; for example, in the case of a multiplexer circuit, many conversions must be performed within a single gate line time.

在此揭露的該些具體實施例描述了傳送至在該像素陣列的該些像素的每一個的一重置電壓的規定;在該像素陣列的該些像素可接收相同的重置電壓,其中該重置電壓以前述的方式被選擇。The specific embodiments disclosed herein describe the provision of a reset voltage transmitted to each of the pixels in the pixel array; the pixels in the pixel array can receive the same reset voltage, wherein the The reset voltage is selected in the aforementioned manner.

從以上的討論應該理解顯示在該些圖式的該些具體實施例僅僅是範例,且包含如在此描述的及如在該些請求項內陳述的可被概括、移除或取代的複數特徵;關於該些圖示,一般而言,應該理解概要的功能的複數方塊圖被使用以表示在此描述的系統與裝置的功能;然而,應該理解該功能不需要以此方式被分開,且不應被採取暗示硬體的任何特定的結構,而是以下描述的與請求的。在該些圖示顯示的一個或更多個元件的功能可進一步地細分,及/或分布遍及本揭露的裝置;在一些具體實施例當中,在該些圖示顯示的一個或更多個元件的功能可被整合為一個單一的功能單元。It should be understood from the above discussion that the specific embodiments shown in the drawings are merely examples, and include plural features that can be summarized, removed or replaced as described herein and as stated in the claims. ; Regarding these diagrams, in general, it should be understood that the plural block diagrams of the general functions are used to represent the functions of the systems and devices described herein; however, it should be understood that the functions need not be separated in this way, and are Should be taken to imply any specific structure of the hardware, but as described below and requested. The functions of one or more elements shown in these illustrations can be further subdivided and/or distributed throughout the disclosed device; in some specific embodiments, one or more elements shown in these illustrations The functions can be integrated into a single functional unit.

例如,已經提到使用一控制器以提供一時脈信號;然而,應該理解在本揭露的上下文當中,該控制器可為該閘極驅動電路的一部份,及/或在此描述的該閘極脈波信號可以被使用以取代該時脈信號;例如,該讀出電路與該閘極驅動電路的操作可藉由使用該些閘極脈波而同步;例如,該讀出電路的每個輸入通道的該整合週期可藉由該閘極脈波而被控制。For example, it has been mentioned that a controller is used to provide a clock signal; however, it should be understood that in the context of this disclosure, the controller may be part of the gate drive circuit, and/or the gate described herein A pulse signal can be used to replace the clock signal; for example, the operation of the readout circuit and the gate drive circuit can be synchronized by using the gate pulses; for example, each of the readout circuits The integration period of the input channel can be controlled by the gate pulse.

在一些例子當中,該控制器的功能可藉由一個一般用途處理器來提供,該一般用途處理器可配置為依據在此描述的那些內容的任何一個以執行一方法;在一些例子當中,該控制器可包含數位邏輯,例如場效可規劃邏輯陣列(field programmable gate arrays)、FPGA、特殊應用積體電路(application specific integrated circuits)、ASIC、一數位信號處理器、DSP,或藉由任何其他適合的硬體。在一些例子當中,一個或更多個記憶體元件可儲存資料及/或程式指令,使用來實施在此描述的該些操作。本揭露的該些具體實施例提供了有形的、非暫時性的儲存媒體,包含程式指令,可操縱以編程一處理器以執行任何被描述的一個或更多個方法及/或在此的請求項及/或提供如描述的資料處理裝置及/或在此的請求項。該控制器可包含一類比控制電路,其中該類比控制電路提供此控制功能的至少一部份。一個具體實施例提供一類比控制電路,其中該類比控制電路配置為執行在此描述的任何一個或更多個控制方法。In some examples, the functions of the controller may be provided by a general-purpose processor, which may be configured to execute a method based on any of those described herein; in some examples, the The controller may contain digital logic, such as field programmable gate arrays, FPGA, application specific integrated circuits, ASIC, a digital signal processor, DSP, or by any other Suitable hardware. In some examples, one or more memory devices can store data and/or program instructions for use to implement the operations described herein. The specific embodiments of the present disclosure provide tangible, non-transitory storage media containing program instructions that can be manipulated to program a processor to execute any one or more methods described and/or requests herein Item and/or provide the data processing device as described and/or the requested item here. The controller may include an analog control circuit, wherein the analog control circuit provides at least a part of the control function. A specific embodiment provides an analog control circuit, wherein the analog control circuit is configured to perform any one or more of the control methods described herein.

上面的該些具體實施例被理解為解說的例子;進一步的具體實施例可被設想。應理解關於任何一個具體實施例所描述的任何特徵可被單獨地使用,或與其他被描述的特徵一起結合,且亦可被使用以結合任何其他該些具體實施例的一個或更多個特徵,或任何其他該些具體實施例的任何組合。此外,上面未描述的同等設備與修改亦可被使用而不離開本發明的範圍,其定義於隨附的複數請求項內。The above specific embodiments are to be understood as illustrative examples; further specific embodiments can be envisaged. It should be understood that any feature described with respect to any one specific embodiment can be used alone, or combined with other described features, and can also be used to combine one or more features of any other such specific embodiment , Or any other combination of these specific embodiments. In addition, equivalent equipment and modifications not described above can also be used without departing from the scope of the present invention, which are defined in the appended plural claims.

1:感應裝置1: induction device

6:控制器6: Controller

8:介電質屏蔽8: Dielectric shielding

10:感應器陣列10: Sensor array

12:觸碰感應像素、感應像素、像素12: Touch sensor pixels, sensor pixels, pixels

14:電容式感應電極、感應電極、電容式分電位器14: Capacitive sensing electrode, sensing electrode, capacitive potentiometer

16:參考電容、電容式分電位器16: Reference capacitor, capacitive potentiometer

18:連接點18: Connection point

20:感應VCI20: Induction VCI

22:控制端、控制端電壓22: Control terminal, control terminal voltage

24:閘極驅動電路24: Gate drive circuit

24-1:閘極驅動通道24-1: Gate drive channel

24-2:閘極驅動通道24-2: Gate drive channel

24-3:閘極驅動通道24-3: Gate drive channel

25:連接器25: Connector

26:讀出電路26: readout circuit

26-1:輸入通道26-1: Input channel

26-2:輸入通道26-2: Input channel

26-3:輸入通道26-3: Input channel

27:主機介面27: Host Interface

28:參考信號供應器28: Reference signal provider

30:閘極線VCI30: Gate line VCI

32:重置電路、控制端32: Reset circuit, control terminal

34:重置電路、VCI、重置VCI34: Reset circuit, VCI, reset VCI

36:第二重置VCI、重置VCI36: Second reset VCI, reset VCI

38:VCI、選擇VCI38: VCI, select VCI

40:控制端40: Control terminal

42:重置電壓供應器42: Reset the voltage supply

44:控制端44: control terminal

46:控制端46: control end

100:子圖、第一子圖、控制電壓100: Subgraph, first subgraph, control voltage

100a:控制電壓100a: control voltage

100b:閘極脈波N-1100b: Gate pulse wave N-1

102:子圖、第二子圖、控制電壓102: Sub-graph, second sub-graph, control voltage

102a:控制電壓102a: Control voltage

102b:閘極脈波N、閘極線脈波N102b: Gate pulse wave N, gate line pulse wave N

104:子圖、第三子圖104: Sub-picture, third sub-picture

104a:指示電壓104a: Indicating voltage

104b:指示電壓104b: Indicating voltage

106:子圖、第四子圖106: Sub-picture, fourth sub-picture

106a:讀出信號106a: Read signal

106b:讀出信號106b: Read signal

Vref:電壓V ref : voltage

Vreset:重置電壓V reset : reset voltage

現在將描述一些實際的實施例,但其僅為舉例而非限制本發明。關於附圖,其中:Some practical embodiments will now be described, but they are only examples and do not limit the invention. Regarding the drawings, where:

圖1包括了包含一感應器陣列的一感應裝置的一平面圖,且圖1的插圖A顯示該感應器陣列的一像素的一電路圖;FIG. 1 includes a plan view of a sensing device including a sensor array, and inset A of FIG. 1 shows a circuit diagram of a pixel of the sensor array;

圖2顯示例如在圖1中說明的一感應裝置的一感應器陣列的一電路圖;FIG. 2 shows a circuit diagram of a sensor array of a sensing device such as that illustrated in FIG. 1;

圖3顯示在圖1所示的型式的另一個感應器陣列的一電路圖;Figure 3 shows a circuit diagram of another sensor array of the type shown in Figure 1;

圖4顯示在圖3所示的型式的在一感應器陣列的一像素的操作的一信號時序圖;FIG. 4 shows a signal timing diagram of the operation of a pixel of a sensor array in the type shown in FIG. 3;

圖5顯示例如於圖3所說明的使用在一感應器陣列的一像素的一電路圖;FIG. 5 shows a circuit diagram of a pixel using a sensor array as illustrated in FIG. 3;

圖6顯示例如於圖3所說明的使用在一感應器陣列的另一個像素的一電路圖。FIG. 6 shows a circuit diagram of another pixel using a sensor array such as that illustrated in FIG. 3.

在該些圖式中,類似的參考數字被使用以指出類似的元件。In the drawings, similar reference numbers are used to indicate similar elements.

1:感應裝置 1: induction device

8:介電質屏蔽 8: Dielectric shielding

10:感應器陣列 10: Sensor array

12:觸碰感應像素 12: Touch-sensitive pixels

14:電容式感應電極 14: Capacitive sensing electrode

16:參考電容 16: Reference capacitance

18:連接點 18: Connection point

20:感應VCI 20: Induction VCI

22:控制端 22: Control terminal

24:閘極驅動電路 24: Gate drive circuit

25:連接器 25: Connector

26:讀出電路 26: readout circuit

27:主機介面 27: Host Interface

Claims (34)

一種感應器陣列(10),包含複數之觸碰感應像素,每個像素(12)包含: 一電容式感應電極(14),用以累積一電荷以回應感應到一導電物體的接近; 一參考電容(16),與該電容式感應電極(14)串聯連接,使得回應一控制電壓,在介於該參考電容(16)及該電容式感應電極(14)之間的連接點(18)提供一指示電壓,以指出感應到該導電物體的接近。A sensor array (10) includes a plurality of touch sensing pixels, and each pixel (12) includes: A capacitive sensing electrode (14) for accumulating a charge in response to sensing the proximity of a conductive object; A reference capacitor (16) is connected in series with the capacitive sensing electrode (14) so as to respond to a control voltage at the connection point (18) between the reference capacitor (16) and the capacitive sensing electrode (14) ) Provide an indicator voltage to indicate the proximity of the conductive object. 如請求項1所述之感應器陣列,其中每個像素(12)包含一感應電壓控制阻抗(VCI)(20),具有連接的一控制端(22),使得該感應VCI(20)的阻抗被該指示電壓所控制。The sensor array according to claim 1, wherein each pixel (12) includes an induced voltage control impedance (VCI) (20), and has a control terminal (22) connected to make the impedance of the induced VCI (20) Controlled by the indicated voltage. 如請求項2所述之感應器陣列,其中該感應VCI(20)的一傳導路徑連接至該參考電容(16)的一第一極板,且該第一VCI(20)的該控制端(22)連接至該參考電容(16)的第二極板。The sensor array according to claim 2, wherein a conductive path of the sensing VCI (20) is connected to a first plate of the reference capacitor (16), and the control terminal ( 22) The second plate connected to the reference capacitor (16). 如請求項3所述之感應器,其中該感應VCI(20)的該傳導路徑連接該參考電容(16)的該第一極板至一讀出電路(26)的一輸入(24)。The sensor according to claim 3, wherein the conductive path of the sensing VCI (20) connects the first plate of the reference capacitor (16) to an input (24) of a readout circuit (26). 如請求項2所述之感應器陣列,其中該感應VCI(20)的一傳導路徑連接一參考信號供應器(28)至一讀出電路(26)的一輸入。The sensor array according to claim 2, wherein a conductive path of the sensor VCI (20) connects a reference signal supplier (28) to an input of a readout circuit (26). 如請求項5所述之感應器,包含一選擇VCI(38),具有介於該感應VCI(20)的該傳導路徑與該參考信號供應器(28)之間串聯連接的一傳導路徑。The sensor according to claim 5, comprising a selection VCI (38) having a conductive path connected in series between the conductive path of the inductive VCI (20) and the reference signal supplier (28). 如請求項6所述之感應器,其中該選擇VCI(38)之一控制端(40)連接至該控制電壓。The sensor according to claim 6, wherein a control terminal (40) of the selection VCI (38) is connected to the control voltage. 如任何前述請求項所述之感應器,其中每個像素包含一重置電路以設定該感應VCI的該控制端(22)至一選定的重置電壓。The sensor according to any of the foregoing claims, wherein each pixel includes a reset circuit to set the control terminal (22) of the sensing VCI to a selected reset voltage. 如請求項8所述之感應器,其中該重置電路的一控制端(32)連接至該感應器的另一個像素以接收一重置信號。The sensor according to claim 8, wherein a control terminal (32) of the reset circuit is connected to another pixel of the sensor to receive a reset signal. 如請求項8或9所述之感應器,其中該重置電路包含一重置VCI(34、36),其中該重置VCI的一傳導路徑連接介於該參考電容的一第二極板與(a)一重置電壓;與(b)該參考電容的一第一極板的其中之一之間。The sensor according to claim 8 or 9, wherein the reset circuit includes a reset VCI (34, 36), wherein a conductive path of the reset VCI is connected between a second plate of the reference capacitor and (A) a reset voltage; and (b) between one of the first plates of the reference capacitor. 如請求項10所述之感應器,其中該重置VCI(34、36)包含兩個傳導路徑,設置為連接該參考電容(16)的該第一及第二極板兩者至一重置電壓。The sensor according to claim 10, wherein the reset VCI (34, 36) includes two conduction paths arranged to connect both the first and second plates of the reference capacitor (16) to a reset Voltage. 如請求項5或任何前述依附於請求項5之請求項所述之感應器,其中每個像素(12)包含一閘極線VCI(30),而該閘極線VCI(30)的一傳導路徑連接該參考信號供應器(28)至該參考電容(16)以提供該控制電壓。The sensor described in claim 5 or any of the foregoing claims attached to claim 5, wherein each pixel (12) includes a gate line VCI (30), and a conduction of the gate line VCI (30) The path connects the reference signal supplier (28) to the reference capacitor (16) to provide the control voltage. 一種操作一感應器陣列的方法,該感應器陣列包含複數之觸碰感應像素,該方法包含: 施加一控制電壓至感應器之一像素之一參考電容以充電該參考電容及一電容式感應電極,其中回應該控制電壓,該參考電容及該電容式感應電極一起提供一指示電壓以指示該像素感應到一導電物體的接近。A method of operating a sensor array, the sensor array including a plurality of touch sensing pixels, the method comprising: A control voltage is applied to a reference capacitor of a pixel of the sensor to charge the reference capacitor and a capacitive sensing electrode, wherein in response to the control voltage, the reference capacitor and the capacitive sensing electrode together provide an indication voltage to indicate the pixel The proximity of a conductive object is sensed. 如請求項13所述之方法,包含使用該指示電壓以控制連接至一讀出電路之一輸入通道的一感應電壓控制阻抗之一傳導路徑之阻抗。The method of claim 13, including using the indication voltage to control the impedance of a conductive path connected to an input channel of a readout circuit by an induced voltage control impedance. 如請求項14所述之方法,包含操作該感應VCI以經由該感應電壓控制阻抗之該傳導路徑連接該控制電壓至該讀出電路之該輸入通道。The method according to claim 14, comprising operating the inductive VCI to connect the control voltage to the input channel of the readout circuit through the conductive path of the induced voltage to control impedance. 如請求項14所述之方法,包含操作該感應VCI以經由該感應電壓控制阻抗之該傳導路徑連接一參考信號供應器至該讀出電路之該輸入通道。The method according to claim 14, including operating the inductive VCI to connect a reference signal supplier to the input channel of the readout circuit through the conductive path of the induced voltage to control impedance. 如請求項16所述之方法,包含操作一閘極線VCI以藉由通過該閘極線VCI之一傳導路徑連接該參考信號供應器至該參考電容以提供該控制電壓。The method according to claim 16, comprising operating a gate line VCI to provide the control voltage by connecting the reference signal supplier to the reference capacitor through a conduction path of the gate line VCI. 如請求項14到17中任一項所述之方法,包含在該控制電壓之一隨後的應用之前重置該參考電容。The method according to any one of claims 14 to 17, comprising resetting the reference capacitance before a subsequent application of one of the control voltages. 如請求項18所述之方法,其中重置該參考電容包含使用施加至該感應器陣列的另一個像素的一控制電壓操作一重置電路。The method of claim 18, wherein resetting the reference capacitor includes operating a reset circuit using a control voltage applied to another pixel of the sensor array. 如請求項19所述之方法,其中重置該參考電容包含連接該參考電容的一第一極板至:(a)一重置電壓;及(b)該參考電容的一第二極板的其中之一。The method of claim 19, wherein resetting the reference capacitor includes connecting a first plate of the reference capacitor to: (a) a reset voltage; and (b) a second plate of the reference capacitor one of them. 如請求項20所述之方法,其中重置該參考電容包含連接該參考電容的該第一與第二極板的兩者至一重置電壓。The method according to claim 20, wherein resetting the reference capacitor includes connecting both of the first and second plates of the reference capacitor to a reset voltage. 如請求項14到21中任一項所述之方法,包含在該感應器陣列的另一個像素的操作之前從供應電壓斷開該感應VCI的一傳導路徑。The method according to any one of claims 14 to 21, comprising disconnecting a conductive path of the sensing VCI from the supply voltage before the operation of another pixel of the sensor array. 如請求項13到22中任一項所述之方法,其中該感應器陣列包含請求項1到12中任一項所述之該感應器陣列。The method according to any one of claims 13-22, wherein the sensor array includes the sensor array according to any one of claims 1-12. 如請求項1到12中任一項所述之感應器陣列,或如請求項13或23所述之方法,其中該些電壓控制阻抗包含複數之電晶體,例如複數之薄膜電晶體(TFTs)。The sensor array according to any one of claims 1 to 12, or the method according to claim 13 or 23, wherein the voltage-controlled impedances comprise a plurality of transistors, such as a plurality of thin film transistors (TFTs) . 如請求項1到12中任一項所述之感應器陣列,或如請求項13或23所述之方法,其中該些電壓控制阻抗係建造在一玻璃或聚合物基板上,其中基板把該電容式感應電極跟感應到的物體分開。The sensor array according to any one of claims 1 to 12, or the method according to claim 13 or 23, wherein the voltage-controlled impedances are built on a glass or polymer substrate, wherein the substrate The capacitive sensing electrode is separated from the sensing object. 一種可調整的電容式觸碰感應器,包含複數之觸碰感應像素,每個包含一電容式分電位器與一重置電壓供應器,被設置為預充電分電位器從而調整感應器的像素的靈敏度。An adjustable capacitive touch sensor, including a plurality of touch sensing pixels, each including a capacitive potentiometer and a reset voltage supply, which is set as a precharge potentiometer to adjust the pixels of the sensor The sensitivity. 如請求項26所述之電容式觸碰感應器,其中該些複數之觸碰感應像素的每一個包含一感應VCI,其中該感應VCI的控制端連接至該電容式分電位器,被配置為依賴於由該電容式分電位器所提供的一指示電壓以提供一輸出信號。The capacitive touch sensor according to claim 26, wherein each of the plurality of touch sensing pixels includes a sensing VCI, wherein the control terminal of the sensing VCI is connected to the capacitive potentiometer and is configured as Relying on an indicator voltage provided by the capacitive potentiometer to provide an output signal. 如請求項26或27所述之電容式觸碰感應器,其中該些複數之觸碰感應像素的每一個包含一重置VCI,其中該重置VC的一傳導路徑係串聯連接介於該電容式分電位器與一重置電壓供應器之間以預充電該分電位器。The capacitive touch sensor according to claim 26 or 27, wherein each of the plurality of touch sensing pixels includes a reset VCI, wherein a conductive path of the reset VC is connected in series between the capacitor Between the type potentiometer and a reset voltage supply to pre-charge the potentiometer. 一種校正如請求項26所述之電容式觸碰感應器的方法,該方法包含: 施加一重置電壓到至少一像素的該分電位器以預充電該分電位器。A method for calibrating the capacitive touch sensor as described in claim 26, the method comprising: A reset voltage is applied to the potentiometer of at least one pixel to precharge the potentiometer. 如請求項29所述之方法,包含基於至少以下之一以選擇該重置電壓: 該感應VCI的一接通電壓; 該感應器的一介電質觸碰屏蔽的一厚度及/或介電常數;及 該感應VCI的操作的一線性區。The method according to claim 29, comprising selecting the reset voltage based on at least one of the following: A turn-on voltage of the induced VCI; A dielectric of the sensor touches a thickness and/or dielectric constant of the shield; and The sensing VCI is a linear region of operation. 如請求項29或30所述之方法,其中該至少一像素包含: 一電容式感應電極(14),用以累積一電荷以回應感應到一導電物體的接近; 一參考電容(16),與該電容式感應電極(14)串聯連接,使得回應一控制電壓,在介於該參考電容(16)及該電容式感應電極(14)之間的連接點(18)提供一指示電壓,以指出感應到該導電物體的接近。The method according to claim 29 or 30, wherein the at least one pixel includes: A capacitive sensing electrode (14) for accumulating a charge in response to sensing the proximity of a conductive object; A reference capacitor (16) is connected in series with the capacitive sensing electrode (14) so as to respond to a control voltage at the connection point (18) between the reference capacitor (16) and the capacitive sensing electrode (14) ) Provide an indicator voltage to indicate the proximity of the conductive object. 如請求項31所述之方法,其中該至少一像素包含一重置電路以設定介於該電容式感應電極及該參考電容之間的該連接點至選定的重置電壓。The method according to claim 31, wherein the at least one pixel includes a reset circuit to set the connection point between the capacitive sensing electrode and the reference capacitor to a selected reset voltage. 如請求項29到32中任一項所述之方法,其中該至少一像素包含如請求項1到12中任一項所述之該像素之特徵及/或其中該方法包含如請求項13到25中任一項所述之方法。The method according to any one of claims 29 to 32, wherein the at least one pixel includes the feature of the pixel as described in any one of claims 1 to 12 and/or wherein the method includes such as claims 13 to The method described in any one of 25. 如請求項26到28中任一項所述之電容式觸碰感應器,其中該些像素包含定義於請求項1到12中任一項所述之特徵。The capacitive touch sensor according to any one of claims 26 to 28, wherein the pixels include the features defined in any one of claims 1 to 12.
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