US6359653B1 - Method and apparatus for VGA to TV data transformation using background-based adaptive flicker reduction - Google Patents
Method and apparatus for VGA to TV data transformation using background-based adaptive flicker reduction Download PDFInfo
- Publication number
- US6359653B1 US6359653B1 US09/338,040 US33804099A US6359653B1 US 6359653 B1 US6359653 B1 US 6359653B1 US 33804099 A US33804099 A US 33804099A US 6359653 B1 US6359653 B1 US 6359653B1
- Authority
- US
- United States
- Prior art keywords
- pixel
- flicker
- value
- current pixel
- flicker reduction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000009467 reduction Effects 0.000 title claims abstract description 84
- 230000003044 adaptive effect Effects 0.000 title claims abstract description 29
- 238000000034 method Methods 0.000 title claims abstract description 26
- 238000013501 data transformation Methods 0.000 title claims abstract description 10
- 238000010586 diagram Methods 0.000 description 8
- 230000009466 transformation Effects 0.000 description 4
- 238000013459 approach Methods 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 230000003139 buffering effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000593 degrading effect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 230000003595 spectral effect Effects 0.000 description 1
- 230000001131 transforming effect Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/39—Control of the bit-mapped memory
- G09G5/393—Arrangements for updating the contents of the bit-mapped memory
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/08—Cursor circuits
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
- H04N5/21—Circuitry for suppressing or minimising disturbance, e.g. moiré or halo
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/445—Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
- H04N5/44504—Circuit details of the additional information generator, e.g. details of the character or graphics signal generator, overlay mixing circuits
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/64—Circuits for processing colour signals
- H04N9/641—Multi-purpose receivers, e.g. for auxiliary information
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2340/00—Aspects of display data processing
- G09G2340/12—Overlay of images, i.e. displayed pixel being the result of switching between the corresponding input pixels
- G09G2340/125—Overlay of images, i.e. displayed pixel being the result of switching between the corresponding input pixels wherein one of the images is motion video
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S348/00—Television
- Y10S348/91—Flicker reduction
Definitions
- the present invention generally relates to the transformation of graphic and video data from VGA to TV interface, and more particularly, to a background-based adaptive method and apparatus for reducing flicker in a picture due to the transformation and improving the quality of the picture.
- the picture of VGA data for computers includes only graphic information. Due to the popularity of DVD (digital video disk), the picture of VGA data comprises both graphic and video information. Generally speaking, graphic data have more high frequency components from a spectral point of view. The change of luminance level is also larger. Therefore, the flicker problem is more pronounced. On the other hand, video data have more low frequency components and the change of luminance level is smaller. It is not so critical whether the flicker problem is addressed or not.
- the primary object of the present invention is to provide a method for reducing the flicker phenomenon in VGA to TV data transformation by using a background-based adaptive flicker reduction technique.
- the component of a picture are categorized as cursor, graphic, video data and sub-picture. Except for video data, other components are usually treated as graphic data.
- flicker reduction is only applied to graphic data because video data do not have severe flicker phenomenon in the data transformation.
- Another object of the invention is to provide a background-based flicker reduction algorithm that adapts to the background automatically.
- the background-based adaptive flicker reduction is enabled, whether the background is bright or dark is determined by computing the mean value around a current pixel.
- a difference value defined according to the absolute differences between the current pixel and its upper pixel and lower pixel is also computed.
- the mean and difference values are used to determine how the background-based adaptive flicker reduction method is applied. Four different degrees of flicker reduction which are strong, median, mild and no reduction may be applied.
- a further object of the invention is to provide an easily realizable apparatus for the background-based flicker reduction.
- the background-based adaptive flicker reduction method can be implemented using simple hardware. Only shifters and simple circuits are required to realize the flicker reduction method. Therefore, the cost of the apparatus for the background-based adaptive flicker reduction of the present invention is relatively low.
- FIG. 1 is a block diagram of a preferred embodiment of the background-based adaptive flicker reduction system according to the present invention.
- FIG. 2 illustrates different components of a picture displayed on a VGA monitor.
- FIG. 3 illustrates a flow diagram of determining whether the adaptive flicker reduction method should be applied to a component in a picture according to the present invention.
- FIG. 4 illustrates a flow diagram of the background-based adaptive flicker reduction according to the present invention.
- FIG. 5 is a block diagram of the hardware implementation of the background-based adaptive flicker reduction method according to the present invention.
- FIG. 1 shows the block diagram of a system that transforms video data from a VGA format to a TV format according to the present invention.
- the graphic and video information is read from the DRAM 101 and then overlaid as pictures of VGA data.
- the format of VGA data is a RGB format.
- Color space conversion 102 transforms a RGB format to a YUV(PAL) or YQI(NTSC) format.
- the flicker reduction technique of this invention is accomplished by buffering the format-converted video and graphic data in a three-line buffer 103 and then performing the background-based adaptive flicker reduction 104 . After the adaptive flicker reduction, high quality TV data with reduced flicker can be obtained.
- FIG. 2 shows the screen of a VGA monitor that comprises different types of information.
- the order of priority in showing data on the screen is cursor sub-picture, video and graphic information when they appear on the same position of the VGA monitor. For example, within the screen of the window, the graphic information and video information are not visible when cursor or sub-picture appears on the same position of the VGA monitor. Therefore, it is very important to determine whether the flicker reduction algorithm should be applied.
- FIG. 3 shows a flow diagram of determining whether the background-based flicker reduction should be applied.
- the background-based adaptive flicker reduction method is applied. Cursor and sub-picture are regarded as graphic information and must be processed using the flicker reduction method.
- any picture as shown in FIG. 2 can be processed adaptively based on the background information when transforming the data from a VGA format to a TV format.
- FIG. 4 shows the flow chart of the background-based adaptive flicker reduction algorithm according to this invention.
- the invention defines Mean and Diff values for each pixel under the anti-flicker processing. These two values are used to determine how the current pixel should be processed. In principle, when the background is bright and the contrast near a pixel is large, a stronger flicker reduction is required. If the background is bright but contrast is not as large, a median flicker reduction can be applied. If the background is bright but contrast is small, no flicker reduction is necessary. If the background is dark but contrast is large, a stronger flicker reduction also needs to be applied.
- Cpixel is defined as the current pixel which is to be processed by the flicker reduction algorithm
- Upixel and Dpixel are defined as the pixels one line above and below the current pixel respectively.
- a Mean value around the pixel is defined as
- the multiplier can be implemented in hardware by shifting the pixel value one bit left.
- the Mean value is used to determine the information of the background according to a threshold value.
- the background is considered bright or dark dependent on whether the Mean value is larger or smaller than the threshold value.
- the Diff value of a current pixel is defined as the summation of the absolute difference between the current pixel value and the pixel value above and below it as shown in the following equation:
- Diff abs( C pixel ⁇ U pixel)+abs( C pixel ⁇ D pixel).
- the Mean and Diff values defined above are used as parameters to evaluate the mode of flicker reduction that should be applied to the current pixel.
- R (10 *C pixel+3 *U pixel+3 *D pixel)/16.
- the anti-flicker output pixel is
- R C pixel
- the human eye When the background is dark, the human eye is less sensitive to the flicker phenomenon in the data transformed from VGA to TV format. However, if larger than normal contrast exists in a picture, flicker becomes a serious problem. Therefore, in the present invention, if the background is dark and the Diff value is larger than Mean value, the strong mode of flicker reduction is adopted to reduce the flicker phenomenon. If the background is dark and the Diff value is between Mean and Mean/2, a mild mode of flicker reduction is applied because only mild flicker is sensed by the human eye.
- the anti-flicker output pixel is
- R (12 *C pixel+2 *U pixel+2 *D pixel)/16.
- the adaptive flicker reduction algorithm of the present invention can be implemented using hardware. To simplify the hardware, multiplication is done by shifting up the bits in the value of a pixel.
- FIG. 5 shows the block diagram of a preferred embodiment of the background-based adaptive flicker reduction system according to the present invention.
- the Mean and Diff blocks compute the Mean and Diff signals respectively around a current pixel according to the formulas discussed above.
- the Background Controller 501 accepts the background state by comparing the Mean value with a Threshold value. Whether the flicker reduction is processed or not is determined by the signal Enable.
- the signal Enable is set to high. On the other hand, the signal Enable is set to low when the screen is used for displaying only video information.
- a three-bit control signal X 2 X 1 X 0 is used to determine the degree of the anti-flicker method.
- the most significant bit X 2 is high, the two control bits X 1 and X 0 are ignored and the adaptive flicker reduction algorithm is adopted. If the X 2 signal is set to low, non-adaptive flicker reduction is adopted.
- the two control bits X 1 X 0 are used to control the degree of the flicker reduction. According to the two control bits X 1 X 0 , one of the four flicker reduction modes which are no, mild, median and strong is selected to process the pixels of the entire picture.
- the x symbol indicates that value can be ignored and has no impact on the result. Only when the signal Enable is set to high, the flicker reduction is applied. Otherwise, no flicker reduction is used to avoid degrading the quality of the picture.
- the Selection Controller 502 accepts Mean, Diff, Background Controller output, user-defined control signals X 2 X 1 X 0 and the signal Enable to generate two new control signals C 1 C 0 . Four different anti-flicker output signals with different degrees of flicker reduction are generated in the flicker reduction processor 503 . Finally, according to control signals C 1 C 0 , one of the anti-flicker signal is selected as the anti-flicker output pixel R by the four-to-one multiplexer Mux 504 .
- the present invention provides a method and apparatus for VGA to TV data transformation by using background-based adaptive flicker reduction.
- the present invention is capable of providing good quality of a picture as compared to other conventional methods.
- the present invention can be implemented by simple hardware circuit and is very suitable for consumer products.
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Graphics (AREA)
- Picture Signal Circuits (AREA)
Abstract
Description
X2 | X1 | X0 | Anti-Flicker Mode |
1 | x | x | adaptive |
0 | 0 | 0 | no |
0 | 0 | 1 | mild |
0 | 1 | 0 | median |
0 | 1 | 1 | strong |
Claims (12)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/338,040 US6359653B1 (en) | 1999-06-22 | 1999-06-22 | Method and apparatus for VGA to TV data transformation using background-based adaptive flicker reduction |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/338,040 US6359653B1 (en) | 1999-06-22 | 1999-06-22 | Method and apparatus for VGA to TV data transformation using background-based adaptive flicker reduction |
Publications (1)
Publication Number | Publication Date |
---|---|
US6359653B1 true US6359653B1 (en) | 2002-03-19 |
Family
ID=23323154
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/338,040 Expired - Lifetime US6359653B1 (en) | 1999-06-22 | 1999-06-22 | Method and apparatus for VGA to TV data transformation using background-based adaptive flicker reduction |
Country Status (1)
Country | Link |
---|---|
US (1) | US6359653B1 (en) |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020122046A1 (en) * | 2001-03-01 | 2002-09-05 | Dischert Lee R. | Method and apparatus for keying of secondary video into primary video |
US20030174247A1 (en) * | 2002-03-12 | 2003-09-18 | Via Technologies, Inc. | Adaptive deflicker method and adaptive deflicker filter |
US20030174245A1 (en) * | 2002-03-12 | 2003-09-18 | Via Technologies, Inc. | Clock signal synthesizer with multiple frequency outputs and method for synthesizing clock signal |
US20030174246A1 (en) * | 2002-03-12 | 2003-09-18 | Via Technologies, Inc. | Method and device for processing image data from non-interlacing type into interlacing one |
US20030189581A1 (en) * | 2002-04-08 | 2003-10-09 | Nasoff David G. | Content based window filtering for simultaneous display of multiple high-quality video and graphics windows |
KR100476937B1 (en) * | 2003-01-10 | 2005-03-16 | 삼성전자주식회사 | Apparatus for adaptive anti-flicker to added information of graphic data |
US6970207B1 (en) * | 1999-08-24 | 2005-11-29 | Stmicroelectronics S.A. | Anti-flicker filtering process and system |
US20060233518A1 (en) * | 2005-04-13 | 2006-10-19 | Yu-Ching Hsieh | Method of scaling subpicture data and related apparatus |
US20060269227A1 (en) * | 2005-05-27 | 2006-11-30 | Yu-Ching Hsieh | Subpicture display device utilizing micro-processor created subpicture address table and related method |
US20090175600A1 (en) * | 2005-04-13 | 2009-07-09 | Yu-Ching Hsieh | Method of scaling subpicture data and related apparatus |
US20150085158A1 (en) * | 2013-02-20 | 2015-03-26 | Hewlett-Packard Development Company, L.P. | Suppressing Flicker in Digital Images |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5894330A (en) | 1997-01-23 | 1999-04-13 | Silicon Integrated Systems Corp. | Adaptive anti-flicker method for VGA to TV data conversion |
US6094226A (en) * | 1997-06-30 | 2000-07-25 | Cirrus Logic, Inc. | System and method for utilizing a two-dimensional adaptive filter for reducing flicker in interlaced television images converted from non-interlaced computer graphics data |
US6172718B1 (en) * | 1998-04-17 | 2001-01-09 | S3 Incorporated | Adaptive dynamic aperture correction |
-
1999
- 1999-06-22 US US09/338,040 patent/US6359653B1/en not_active Expired - Lifetime
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5894330A (en) | 1997-01-23 | 1999-04-13 | Silicon Integrated Systems Corp. | Adaptive anti-flicker method for VGA to TV data conversion |
US6094226A (en) * | 1997-06-30 | 2000-07-25 | Cirrus Logic, Inc. | System and method for utilizing a two-dimensional adaptive filter for reducing flicker in interlaced television images converted from non-interlaced computer graphics data |
US6172718B1 (en) * | 1998-04-17 | 2001-01-09 | S3 Incorporated | Adaptive dynamic aperture correction |
Cited By (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6970207B1 (en) * | 1999-08-24 | 2005-11-29 | Stmicroelectronics S.A. | Anti-flicker filtering process and system |
US20020122046A1 (en) * | 2001-03-01 | 2002-09-05 | Dischert Lee R. | Method and apparatus for keying of secondary video into primary video |
US7061509B2 (en) * | 2001-03-01 | 2006-06-13 | Matsushita Electric Industrial Co., Ltd. | Method and apparatus for keying of secondary video into primary video |
US7084925B2 (en) | 2002-03-12 | 2006-08-01 | Via Technologies, Inc. | Method and device for processing image data from non-interlacing type into interlacing one |
US20030174247A1 (en) * | 2002-03-12 | 2003-09-18 | Via Technologies, Inc. | Adaptive deflicker method and adaptive deflicker filter |
US20030174245A1 (en) * | 2002-03-12 | 2003-09-18 | Via Technologies, Inc. | Clock signal synthesizer with multiple frequency outputs and method for synthesizing clock signal |
US20030174246A1 (en) * | 2002-03-12 | 2003-09-18 | Via Technologies, Inc. | Method and device for processing image data from non-interlacing type into interlacing one |
US7102690B2 (en) | 2002-03-12 | 2006-09-05 | Via Technologies Inc. | Clock signal synthesizer with multiple frequency outputs and method for synthesizing clock signal |
US7061537B2 (en) * | 2002-03-12 | 2006-06-13 | Via Technologies, Inc. | Adaptive deflicker method and adaptive deflicker filter |
US20030189581A1 (en) * | 2002-04-08 | 2003-10-09 | Nasoff David G. | Content based window filtering for simultaneous display of multiple high-quality video and graphics windows |
KR100476937B1 (en) * | 2003-01-10 | 2005-03-16 | 삼성전자주식회사 | Apparatus for adaptive anti-flicker to added information of graphic data |
US20060233518A1 (en) * | 2005-04-13 | 2006-10-19 | Yu-Ching Hsieh | Method of scaling subpicture data and related apparatus |
US7526186B2 (en) | 2005-04-13 | 2009-04-28 | Mediatek Incorporation | Method of scaling subpicture data and related apparatus |
US20090175600A1 (en) * | 2005-04-13 | 2009-07-09 | Yu-Ching Hsieh | Method of scaling subpicture data and related apparatus |
US8265461B2 (en) | 2005-04-13 | 2012-09-11 | Mediatek Inc. | Method of scaling subpicture data and related apparatus |
US20060269227A1 (en) * | 2005-05-27 | 2006-11-30 | Yu-Ching Hsieh | Subpicture display device utilizing micro-processor created subpicture address table and related method |
CN100544413C (en) * | 2005-05-27 | 2009-09-23 | 联发科技股份有限公司 | Video processing circuit, multimedia playing system and method for decoding sub-picture data |
US20150085158A1 (en) * | 2013-02-20 | 2015-03-26 | Hewlett-Packard Development Company, L.P. | Suppressing Flicker in Digital Images |
US9264629B2 (en) * | 2013-02-20 | 2016-02-16 | Hewlett-Packard Development Company, L.P. | Suppressing flicker in digital images |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN110545413B (en) | Method and apparatus for performing tone mapping of high dynamic range video | |
US5633687A (en) | Method and system for providing an interlaced image on an display | |
US7769089B1 (en) | Method and system for reducing noise level in a video signal | |
US6788353B2 (en) | System and method for scaling images | |
US6175659B1 (en) | Method and apparatus for image scaling using adaptive edge enhancement | |
KR100525143B1 (en) | Liquid crystal display method | |
US6359653B1 (en) | Method and apparatus for VGA to TV data transformation using background-based adaptive flicker reduction | |
US8270750B2 (en) | Image processor, display device, image processing method, and program | |
KR101098630B1 (en) | Motion adaptive upsampling of chroma video signals | |
US6115498A (en) | Character image generating apparatus and method therefor | |
US8279346B2 (en) | Frame rate converting apparatus and method thereof | |
US10554900B2 (en) | Display apparatus and method of processing image thereof | |
US5894330A (en) | Adaptive anti-flicker method for VGA to TV data conversion | |
Someya et al. | The suppression of noise on a dithering image in LCD overdrive | |
US20010048771A1 (en) | Image processing method and system for interpolation of resolution | |
US6999621B2 (en) | Text discrimination method and related apparatus | |
AU781541B2 (en) | Scanning conversion circuit | |
US5894329A (en) | Display control unit for converting a non-interlaced image into an interlaced image and displaying the converted image data | |
US7430014B2 (en) | De-interlacing device capable of de-interlacing video fields adaptively according to motion ratio and associated method | |
JPH09219830A (en) | Video processor | |
JP4551343B2 (en) | Video processing apparatus and video processing method | |
US20050057565A1 (en) | Information processing apparatus, semiconductor device for display control and video stream data display control method | |
JP2009296284A (en) | Video processing device and video display device using the video processing device | |
JP3075505B2 (en) | Display control device and control method thereof | |
US7327332B2 (en) | Plasma display panel video processing circuit and method and video display device and method using plasma display panel |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: SILICON INTEGRATED SYSTEMS CORP., TAIWAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:HUANG, CHIEN-HSIU;REEL/FRAME:010060/0931 Effective date: 19990616 |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
FEPP | Fee payment procedure |
Free format text: PAT HOLDER NO LONGER CLAIMS SMALL ENTITY STATUS, ENTITY STATUS SET TO UNDISCOUNTED (ORIGINAL EVENT CODE: STOL); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
FPAY | Fee payment |
Year of fee payment: 4 |
|
FPAY | Fee payment |
Year of fee payment: 8 |
|
FEPP | Fee payment procedure |
Free format text: PAYER NUMBER DE-ASSIGNED (ORIGINAL EVENT CODE: RMPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
AS | Assignment |
Owner name: XIAHOU HOLDINGS, LLC, DELAWARE Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SILICON INTEGRATED SYSTEMS CORP.;REEL/FRAME:029088/0198 Effective date: 20120926 |
|
FPAY | Fee payment |
Year of fee payment: 12 |
|
AS | Assignment |
Owner name: HANGER SOLUTIONS, LLC, GEORGIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:INTELLECTUAL VENTURES ASSETS 158 LLC;REEL/FRAME:051486/0425 Effective date: 20191206 |
|
AS | Assignment |
Owner name: INTELLECTUAL VENTURES ASSETS 158 LLC, DELAWARE Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:XIAHOU HOLDINGS, LLC;REEL/FRAME:051760/0260 Effective date: 20191126 |