JP2001189233A - Layered capacitor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a layered capacitor superior in reliability against thermal shock. SOLUTION: A layered capacitor 10 contains three layered ceramic capacitor elements 12. The layered ceramic capacitor elements 12 have external electrodes at both ends. Solder layers 26a and 26b are formed over the whole surfaces of the external electrodes at both ends of the three ceramic capacitor elements 12. With these solder layers 26a and 26b, the three ceramic capacitor elements 12 are bonded in the stacked state. The external electrodes are connected electrically, and metal terminals 30a and 30b are connected with the external electrodes of the lower layered ceramic capacitor element 12.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer capacitor, and more particularly to a multilayer capacitor having a plurality of multilayer ceramic capacitor elements and metal terminals. High-capacitance multilayer capacitor.

[0002]

2. Description of the Related Art A multilayer capacitor with a metal terminal is used for securing deflection resistance and relaxing thermal stress to improve thermal shock resistance. In such multilayer capacitors,
Generally, a multilayer ceramic capacitor element is floated from a substrate by a metal terminal. Furthermore, the actual Kaihei 1-11
Bending of the metal terminal is performed as disclosed in US Pat. When these techniques are used, the difference in thermal expansion between a multilayer ceramic capacitor element and a substrate having large thermal expansion such as an aluminum substrate can also be reduced. When forming such a multilayer capacitor having a plurality of multilayer ceramic capacitor elements, external electrodes of the plurality of multilayer ceramic capacitor elements are partially connected by a conductive resin or solder paste.

[0003]

However, in a multilayer capacitor in which the external electrodes of a plurality of multilayer ceramic capacitor elements are partially connected by a conductive resin or solder paste, thermal stress concentrates on the connection portions, and the connection portions are not connected. Also, cracks may occur in the multilayer ceramic capacitor element and the capacitance may decrease.

[0004] Therefore, a main object of the present invention is to provide a multilayer capacitor having high reliability against thermal shock.

[0005]

SUMMARY OF THE INVENTION A multilayer capacitor according to the present invention has a plurality of multilayer ceramic capacitor elements having external electrodes formed at both ends, and a solder formed on the entire surface of the external electrodes of the multilayer ceramic capacitor elements. And a metal terminal electrically connected to an external electrode of the plurality of multilayer ceramic capacitor elements.The plurality of multilayer ceramic capacitor elements are joined by a solder layer in a stacked state, and the plurality of multilayer ceramic capacitor elements are The external electrodes are multilayer capacitors electrically connected by a solder layer. In the multilayer capacitor according to the present invention, the metal terminal is directly connected to at least one of the plurality of multilayer ceramic capacitor elements by a solder layer. In this case, the metal terminal does not have to be directly joined to at least another one of the plurality of multilayer ceramic capacitor elements. Further, in the multilayer capacitor according to the present invention, the metal terminal is formed at the middle portion, at one end of the middle portion, so as to face the middle portion at a distance from the middle portion, and at the end portion formed at the other end of the middle portion. The tip portion has a spring property with respect to the middle portion and the end portion, and may be connected to an external electrode of the multilayer ceramic capacitor element by a solder layer.
In this case, a film to which solder is not easily attached may be formed on the inner surface of the metal terminal. Further, in the multilayer capacitor according to the present invention, a cutout for adjusting a reactance component may be formed in the metal terminal.

In the multilayer capacitor according to the present invention, the solder layer is formed on the entire surface of the external electrodes of the plurality of multilayer ceramic capacitor elements.
The thermal stress is dispersed, and cracks are less likely to occur in the connection portion of the multilayer ceramic capacitor element and the multilayer ceramic capacitor element. Therefore, the multilayer capacitor according to the present invention has improved reliability against thermal shock.

The above and other objects, features and advantages of the present invention will become more apparent from the following detailed description of embodiments of the present invention with reference to the accompanying drawings.

[0008]

FIG. 1 is a perspective view showing a multilayer capacitor according to a first embodiment of the present invention. The multilayer capacitor 10 shown in FIG. 1 includes three multilayer ceramic capacitor elements 12, 12, 12.

The multilayer ceramic capacitor element 12 includes a laminate 14 as shown in FIG. The laminate 14 includes a plurality of dielectric layers 16 made of, for example, a barium titanate-based dielectric and a plurality of internal electrodes 18 made of an electrode material such as Ni. The plurality of dielectric layers 16 and the plurality of internal electrodes 18 are alternately stacked. In this case, every other internal electrode 18 is formed up to one end surface of the stacked body 14, and every other internal electrode 18 is formed on the stacked body 14.
Is formed up to the other end face opposite to one end face.
Further, a Cu layer 20a, a Ni layer 22a, and a Sn layer 24a are formed in this order as external electrodes at one end including one end surface of the stacked body 14. In this case, one end of the laminate 14 is coated with a Cu paste to a thickness of 100 μm,
After drying at 150 ° C. for 10 minutes, baking is performed at 800 ° C. for 5 minutes to form the Cu layer 20a. Also, the Ni layer 22a is 1 μm thick by wet plating.
Then, a Sn layer 24a is formed to a thickness of 5 μm, respectively. Similarly, a Cu layer 20b, a Ni layer 22b, and a Sn layer 24b are formed in this order as external electrodes on the other end portion including the other end surface of the stacked body 14.

Three multilayer ceramic capacitor elements 1
2, 12, and 12, as shown in FIG.
It is flow soldered to two metal terminals 30a and 30b made of Cr.

That is, one metal terminal 30a includes a plate-shaped intermediate portion 32a. At the upper end of the intermediate portion 32a, a plate-shaped tip portion 34a is formed so as to face the intermediate portion 32a. A gap may be formed between the distal end portion 34a and the intermediate portion 32a. The length in the vertical direction of the tip portion 34 a is formed to be 2.5 mm, which is slightly longer than the height of the multilayer ceramic capacitor element 12. At the lower end of the intermediate portion 32a, a plate-shaped end portion 36a is provided.
And extend in a direction substantially perpendicular thereto. Therefore, the tip portion 34a has a spring property with respect to the intermediate portion 32a and the end portion 36a. Further, the outer surfaces of the metal terminals 30a (the surfaces of the intermediate portion 32a and the distal end portion 34a that do not face each other and the lower surface of the terminal portion 36a connected thereto) are plated with solder. When a metal terminal material to which solder is easily attached, for example, brass, is used, the inner surface of the metal terminal 30a (the intermediate portion 3) is used.
A coating 38a that is hard to adhere to solder is formed on the surface facing the 2a and the tip portion 34a and the upper surface of the terminal portion 36a connected thereto. This film 38a is formed of, for example, metal oxide, wax, resin or silicone oil. Similarly, the other metal terminal 30b is connected to the intermediate portion 32
b, a coating 3 including a tip portion 34b and a terminal portion 36b, the outer surface of which is plated with solder, and the inner surface of which is less likely to be soldered.
8b are formed.

Then, the entire surfaces of the external electrodes (Sn layers 24a and 24b) of the three multilayer ceramic capacitor elements 12, 12, 12 are coated with high-temperature solder (Pb: Sn = 85, 15) by flow soldering. Solder layers 26a and 26b are formed, respectively. By these solder layers 26a and 26b, the three multilayer ceramic capacitors 12, 12, 12 are joined in a stacked state, and the external electrodes are electrically connected.
Of the metal terminals 30a and 30b to the external electrodes
a and 34b are connected.

FIG. 3 is a perspective view showing a multilayer capacitor according to a second embodiment of the present invention. In the multilayer capacitor 10 shown in FIG. 3, compared to the multilayer capacitor 10 shown in FIG. 1, the length of the tip portions 34a and 34b of the metal terminals 30a and 30b made of Fe—Cr in the vertical direction is three. It is formed to have a height of 7.0 mm approximately equal to the height of the element 12. In addition, the length in the vertical direction of the intermediate portions 32a and 32b of the metal terminals 30a and 30b is formed longer by that much. Further, the metal terminals 3 are connected to the external electrodes of the three multilayer ceramic capacitor elements 12, 12, 12 by the solder layers 26a and 26b.
The leading ends 34a and 34b of Oa and 30b are connected.

FIG. 4 is a perspective view showing a multilayer capacitor of a first comparative example, and FIG. 5 is an exploded perspective view showing a main part thereof. The multilayer capacitor 11 shown in FIG. 4 is different from the multilayer capacitor 10 shown in FIG. 1 only in the portions where the external electrodes of the three multilayer ceramic capacitor elements 12, 12, 12 are opposed to the external electrodes. ) Is applied, and then the metal terminals 30 a and 30 b made of Fe—Cr are connected to the multilayer ceramic capacitor 12. Therefore, the solder layers 26a and 26b are formed only on the opposing portions of the external electrodes of the three multilayer ceramic capacitors 12, 12, and 12 and on the opposing portions of the external electrodes and the metal terminals.

FIG. 6 is a perspective view showing a multilayer capacitor according to a second comparative example. The multilayer capacitor 11 shown in FIG.
The solder paste is applied only to the opposing portions of the external electrodes of the three multilayer ceramic capacitor elements 12, 12, 12 as compared with the multilayer capacitor 10 shown in FIG.
Metal terminals 30 a and 30 b made of e-Cr are connected to multilayer ceramic capacitor 12. Therefore, the solder layers 26a and 26b are provided only at the opposing portions of the external electrodes of the three multilayer ceramic capacitors 12, 12, and 12, and at the opposing portions of the external electrodes and metal terminals of the lowermost multilayer ceramic capacitor element 12. Formed.

The thermal shock cycle characteristics when the multilayer capacitors of Examples 1, 2 and Comparative Examples 1 and 2 were mounted on an aluminum substrate were examined. The results are shown in Table 1. In this case, the thermal shock cycle characteristics are as follows:
A thermal change of −55 ° C. to 125 ° C. is defined as one cycle of thermal shock.
The failure occurrence rate (the number of failure occurrences / the total number of failures) in which the change (decrease) in the capacitance was 10% or more before and after the thermal shock of the cycle was applied was examined.

[0017]

[Table 1]

According to the results shown in Table 1, in Examples 1 and 2 in which a solder layer was formed on the entire surface of the external electrode of the multilayer ceramic capacitor element, the number of defects caused by thermal shock was 0, whereas It can be seen that in Comparative Examples 1 and 2 in which a solder layer was partially formed on the surface of the external electrode of the capacitor element, a defect occurred due to thermal shock. This is because, when the external electrodes of the multilayer ceramic capacitor element are partially connected with a solder layer, the thermal stress concentrates on the connection part when the thermal shock cycle test is performed, and the connection part and the multilayer ceramic capacitor element are cracked. This is because the capacitance is reduced due to the occurrence. On the other hand, when a solder layer is formed on the entire surface of the external electrodes of the multilayer ceramic capacitor element, thermal stress is dispersed by the solder layer, and cracks are less likely to occur at the connection portion of the multilayer ceramic capacitor element and the multilayer ceramic capacitor element. This is because the reliability against thermal shock is improved.

When solder layers are formed on the entire surfaces of the external electrodes of a plurality of multilayer ceramic capacitor elements as in the first and second embodiments, the bonding strength of the plurality of multilayer ceramic capacitor elements is improved. Therefore, it is not necessary to form metal terminals corresponding to all the external electrodes of the plurality of multilayer ceramic capacitor elements to be joined.

Further, as in the first and second embodiments described above, since the distal end of the metal terminal has a spring property with respect to the intermediate portion and the distal end, the multilayer ceramic capacitor element and the substrate on which the multilayer capacitor is to be mounted are not required. The difference in thermal expansion can be reduced. In addition, since a film to which solder does not easily adhere is formed on the inner surface of the metal terminal, the spring property of the metal terminal is not impaired due to the solder being applied to the inner surface of the metal terminal.

FIG. 7 is a perspective view showing a multilayer capacitor according to a third embodiment of the present invention. The multilayer capacitor 10 shown in FIG. 7 has the same structure as the multilayer capacitor 10 shown in FIG.

FIG. 8 is a perspective view showing a multilayer capacitor according to a fourth embodiment of the present invention. In the multilayer capacitor 10 shown in FIG. 8, compared to the multilayer capacitor 10 shown in FIG. 7, the length of the tips 34a and 34b of the metal terminals 30a and 30b made of Fe--Cr in the vertical direction is two. It is formed to have a height of 5.1 mm which is substantially equal to the height of the element 12. In addition, the length in the vertical direction of the intermediate portions 32a and 32b of the metal terminals 30a and 30b is formed longer by that much.

FIG. 9 is a perspective view showing a multilayer capacitor according to a fifth embodiment of the present invention. The multilayer capacitor 10 shown in FIG. 9 has the same structure as the multilayer capacitor 10 shown in FIG.

FIG. 10 is a perspective view showing a multilayer capacitor according to a sixth embodiment of the present invention. In the multilayer capacitor 10 shown in FIG. 10, compared to the multilayer capacitor 10 shown in FIG. 9, the length of the tip portions 34a and 34b of the metal terminals 30a and 30b made of Fe—Cr in the vertical direction is three. It is formed to be 10.1 mm longer than the height of the element 12. In addition, the length in the vertical direction of the intermediate portions 32a and 32b of the metal terminals 30a and 30b is formed longer by that much.

FIG. 11 is a perspective view showing a multilayer capacitor of a third comparative example. The multilayer capacitor 11 shown in FIG.
Compared with the multilayer capacitor 10 shown in FIGS. 7 to 10, the metal terminals 30a and 30b are not formed.

Then, the third embodiment, the fourth embodiment, the fifth embodiment,
The ESR and ESL of the multilayer capacitors of Example 6 and Comparative Example 3 were measured, the deflection when the multilayer capacitors were mounted on a glass epoxy substrate was measured, and the thermal shock when the multilayer capacitors were mounted on an aluminum substrate was measured. The cycle characteristics were examined, and the results are shown in Table 2. In addition, ESR measured each ESR in 100 kHz and 400 kHz, and ESL measured ESL in 10 MHz. The thermal shock cycle characteristic is-
With a thermal change of 55 ° C. to 125 ° C. as one cycle of thermal shock, a change (decrease) in capacitance when applying 250 cycles of thermal shock has a failure occurrence rate of 10% or more (number of failure occurrences / total number of tests) ).

[0027]

[Table 2]

In this example, from the results in Table 2, when a metal terminal made of Fe—Cr is used, the length of the tip of the metal terminal in the vertical direction is set to 5.1 mm, thereby increasing the ESR and ESL. It can be seen that the deflection and the thermal shock cycle characteristics can also be improved by minimizing.

In the multilayer capacitors of the above-described third, fourth, fifth, sixth and comparative example 3, the metal terminals were formed of brass.
The SR and ESL were measured, the deflection when mounted on a glass epoxy substrate was measured, and the thermal shock cycle characteristics when mounted on an aluminum substrate were examined. The results are shown in Table 3.

[0030]

[Table 3]

From the results shown in Table 3, when the metal terminals are formed of brass, the thermal shock cycle characteristics are slightly deteriorated.
It can be seen that the ESR can be further reduced.

In the multilayer capacitor as described above, if the length of the metal terminal is long, the ESR and ESL become large, which may cause a problem. Therefore, the length of the metal terminal should be as short as possible. On the other hand, for a feedback control circuit of a DC-DC converter, it is optimal that the ESR is constant in the frequency band to be adjusted and is about several mΩ to about 10 mΩ. Therefore, by using the multilayer capacitor and the method of manufacturing the same according to the present invention, it is possible to reduce the length of the metal terminal, and it is possible to adjust and control the length of the metal terminal so as to satisfy these conditions. it can.
That is, according to the present invention, it is possible to reduce the size of the metal terminal to the minimum length of the metal terminal required by the thermal shock cycle and the bending strength.
Is possible. Further, according to the present invention, it is possible to manufacture a required ESR multilayer capacitor by adjusting the resistance value and length of the metal terminal.

FIG. 12 is a perspective view showing a multilayer capacitor according to a seventh embodiment of the present invention. In the multilayer capacitor 10 shown in FIG. 12, the intermediate portion 32 of the metal terminals 30a and 30b is particularly different from the multilayer capacitor 10 shown in FIG.
notches 40a and 4c at the center in the width direction of
0b is formed. Thus, the metal terminals 30a and 3
When notches 40a and 40b are formed in 0b, the reactance components of metal terminals 30a and 30b can be adjusted. Further, as shown in FIG.
0a, one end and the other end of the end portion 36a divided by the notch portion 40a are connected to the pattern electrodes P1 and P2.
To the notch 4 in the metal terminal 30b.
One end and the other end of the end portion 36b divided by 0b are connected to the pattern electrodes P3 and P4, respectively, and as shown by the arrow shown in the figure, the middle portion divided by the cutout portion 40b (40a) of the metal terminal 30b (30a). Part 32b (32
A current flows in opposite directions in one part and the other part of a).
ESL can be reduced by canceling the magnetic flux. Note that these notches 40a and 40
b is not limited to the center in the width direction of the intermediate portions 32a and 32b of the metal terminals 30a and 30b.
It may be formed in other parts of the parts a and 30b, or a plurality of parts may be formed.

Although three laminated ceramic capacitor elements are used in each of the above embodiments, two or more laminated ceramic capacitor elements may be used in the present invention.

In each of the above embodiments, the external electrodes of the multilayer ceramic capacitor element are formed of Cu layer, Ni layer and Sn layer.
Although the external electrodes are formed in a three-layer structure, the external electrodes may be formed in other structures as long as solder is attached.

Further, in the present invention, in order to improve the strength between the plurality of multilayer ceramic capacitor elements, a joining resin may be inserted in a central portion between them.

The material of the metal terminal is not limited to Fe-Cr and brass, but may be made of Ag, Ni, Cu, Fe, Cr or an alloy thereof.

[0038]

According to the present invention, a multilayer capacitor having high reliability against thermal shock can be obtained. Further, according to the present invention, an increase in ESR and ESL due to the metal terminal can be prevented.

[Brief description of the drawings]

FIG. 1 is a perspective view showing a multilayer capacitor according to a first embodiment of the present invention.

FIG. 2 is an illustrative view showing one example of a multilayer ceramic capacitor element;

FIG. 3 is a perspective view showing a multilayer capacitor according to a second embodiment of the present invention.

FIG. 4 is a perspective view showing a multilayer capacitor of a first comparative example.

FIG. 5 is an exploded perspective view showing a main part of the multilayer capacitor shown in FIG.

FIG. 6 is a perspective view showing a multilayer capacitor of a second comparative example.

FIG. 7 is a perspective view showing a multilayer capacitor according to a third embodiment of the present invention.

FIG. 8 is a perspective view showing a multilayer capacitor according to a fourth embodiment of the present invention.

FIG. 9 is a perspective view showing a multilayer capacitor according to a fifth embodiment of the present invention.

FIG. 10 is a perspective view showing a multilayer capacitor of a sixth embodiment according to the present invention.

FIG. 11 is a perspective view showing a multilayer capacitor of a third comparative example.

FIG. 12 is a perspective view showing a multilayer capacitor of a seventh embodiment according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Multilayer capacitor 12 Multilayer ceramic capacitor element 14 Multilayer body 16 Dielectric layer 18 Internal electrode 20a, 20b Cu layer 22a, 22b Ni layer 24a, 24b Sn layer 26a, 26b Solder layer 28a, 28b Notch 30a, 30b Metal terminal 32a, 32b Intermediate part 34a, 34b Tip part 36a, 36b End part 38a, 38b Coating 40a, 40b Notch

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Yasunobu Yoneda 2-26-10 Tenjin, Nagaokakyo-shi, Kyoto F-term in Murata Manufacturing Co., Ltd. (Reference) 5E001 AB03 AC09 AE02 AE03 AF01 AF02 AF06 AH05 AH07 AJ03 5E082 AA02 AB03 BB10 BC33 CC05 EE23 FG06 FG26 FG27 GG08 GG11 GG21 GG26 JJ12 JJ21 JJ23 JJ27 LL02

Claims (6)

[Claims] A plurality of multilayer ceramic capacitor elements having external electrodes formed at both ends; a solder layer formed on the entire surface of the external electrodes of the plurality of multilayer ceramic capacitor elements; A metal terminal electrically connected to the external electrode, wherein the plurality of multilayer ceramic capacitor elements are joined by the solder layer in a stacked state, and the external electrodes of the plurality of multilayer ceramic capacitor elements are Multilayer capacitors that are electrically connected by solder layers. 2. The multilayer capacitor according to claim 1, wherein the metal terminal is directly connected to at least one of the plurality of multilayer ceramic capacitor elements by the solder layer. 3. The multilayer capacitor according to claim 2, wherein the metal terminal is not directly joined to at least another one of the plurality of multilayer ceramic capacitor elements. 4. The metal terminal comprises: a middle portion; a tip portion formed at one end of the middle portion so as to face the middle portion at an interval; and a tip portion formed at the other end of the middle portion. 4. The semiconductor device according to claim 1, wherein the tip portion has a spring property with respect to the intermediate portion and the end portion, and is connected to the external electrode of the multilayer ceramic capacitor element by the solder layer. 5. 12. The multilayer capacitor according to any one of the above. 5. The multilayer capacitor according to claim 4, wherein a film to which solder does not easily adhere is formed on an inner surface of the metal terminal. 6. The multilayer capacitor according to claim 1, wherein a cutout for adjusting a reactance component is formed in the metal terminal.